Staff Engineer, DFT

1 week ago


Singapore AMBIQ MICRO SINGAPORE PRIVATE LTD Full time

Company Overview Ambiq's mission is to enable intelligence everywhere by delivering the lowest power semiconductor solutions. Ambiq is a pioneer and a leading provider of ultra-low-power semiconductor solutions based on our proprietary and patented sub- and near-threshold technologies. With the increasing power requirements of artificial intelligence (AI) computing, our customers are relying on our solutions to deliver AI to edge environments. Our hardware and software innovations fundamentally deliver a multi-fold improvement in power consumption over traditional semiconductor designs without expensive process geometry scaling. We began in 2010 by addressing the power consumption challenges of battery-powered devices at the edge, where they were most pronounced. As of the beginning of 2025, we have shipped more than 280+ million units worldwide. Our innovative and fast-moving teams of design, research, development, production, marketing, sales, and operations are spread across several continents, including the US (Austin), Taiwan (Hsinchu), China (Shanghai and Shenzhen), and Singapore. We value relentless technology innovation, a deep commitment to customer success, collaborative problem-solving, and an enthusiastic pursuit of energy efficiency. We embrace candidates who also share these same values. The successful candidate must be self-motivated, creative, and comfortable learning and driving exciting new technologies. We encourage and nurture an environment that fosters growth and opportunities to work on complex, meaningful, and challenging projects, creating a lasting impact and shaping the future of technology. Join us on our quest for enabling billions of intelligent devices. The intelligence everywhere revolution starts here. Responsibilities Responsible for scan insertion, boundary scan, MBIST, ATPG for ultra-low power SoC based on subthreshold operation using standard EDA tools. Develop and implement low-power DFT architecture and infrastructure. Generate structural test vectors, analyse, and improve coverage, test time and test cost. Perform pre/post-layout scan and MBIST simulations. Work with designers on STA, physical, power and logical issues related to DFT. Work with test engineers to bring up test vectors on silicon. Qualifications BS/MS in ECE/EE and at least 10 years of experience in DFT implementation. Skilled in different types of DFT structures, including scan (Stuck-At, At-Speed, Path-Delay), scan compression, boundary scan and MBIST. Experience in creating and implementing hierarchical DFT architecture in complex SoC. Experience in Low-Power DFT and MBIST. Experience in test time and test coverage analysis for scan and MBIST patterns. Experience in working with test engineering team to bring up production test program. Extensive knowledge of timing concepts and constraint development. Experience in developing scan ATPG and MBIST test benches and simulation in pre/post-layout environments. Experience in RTL is required. Experience in scripting like Tcl is preferred. Experience with GLS (gate level simulation) is preferred. Motivated, self-driven engineer with attention to detail. Strong verbal and written English communication skills. What You Need We're seeking passionate technologists who thrive on pushing boundaries, solving complex challenges, and driving transformative solutions. At Ambiq, you'll collaborate with a dynamic team that values relentless innovation, customer-centric thinking, and continuous learning. If you're a self-motivated, creative problem-solver eager to push technological limits and make a meaningful impact in energy efficiency, this is your opportunity to grow, excel, and turn groundbreaking ideas into reality. Most importantly, the successful candidate will be able to live the Ambiq Shared Values: Innovate: We tenaciously find ways to break down the barriers to possible solutions Collaborate: We proactively communicate and encourage each other to be better. Focus: We keep the voice of the customer at the centre of everything we do. Learn: We strive for continuous improvement and are always curious. Achieve: We execute on quality and follow through on our commitments. #J-18808-Ljbffr



  • Singapore SEARCH STAFFING SERVICES PTE. LTD. Full time

    Our client is a leading startup in the semiconductor field and a leader in designing ultra low-power microprocessors. The Singapore office houses the Regional Technology Design Center which will be driving the growth and innovation for its products. **Senior Staff Engineer - Design For Test (DFT) **Responsibilities**: - Responsible for scan insertion,...


  • Singapore OMNIVISION Full time

    Position Overview We are seeking a highly skilled and experienced Senior/Staff DFT (Design for Test) Engineer to join our team. In this role, you will be instrumental in defining and implementing the test strategy for our complex CIS/SoC/TDDI designs. You will take ownership of the entire DFT flow, from architecture to pattern generation, ensuring the...


  • Singapore AMBIQ MICRO SINGAPORE PRIVATE LTD. Full time

    **Specific Responsibilities** - Responsible for scan insertion, boundary scan, MBIST, ATPG for ultra-low power SoC based on subthreshold operation using standard EDA tools. - Develop and implement low-power DFT architecture and infrastructure. - Generate structural test vectors, analyze and improve coverage, test time and test cost. - Perform pre/post-layout...

  • DFT Engineer

    22 hours ago


    Singapore Omnivision Full time $120,000 - $200,000 per year

    Description Position Overview We are seeking a highly skilled and experienced Senior/Staff DFT (Design for Test) Engineer to join our team. In this role, you will be instrumental in defining and implementing the test strategy for our complex CIS/SoC/TDDI designs. You will take ownership of the entire DFT flow, from architecture to pattern generation,...

  • DFT Engineer

    5 days ago


    Singapore SUNLUNE (SINGAPORE) PTE. LTD. Full time $120,000 - $200,000 per year

    Job Overview:We are seeking an experienced AI Chip DFT (Design for Test) Engineer to lead the design and implementation of test architectures for our advanced AI chip designs, ensuring efficient and reliable testing processes. This role involves taking ownership of integrating DFT circuits (Scan, Mbit, Memory repair, Bscan), performing comprehensive...

  • DFT engineer

    21 hours ago


    Singapore, South East, Uni Connect Full time $120,000 - $180,000 per year

    Responsible for scan insertion, boundary scan, MBIST, ATPG for ultra -low power SoC based on subthreshold operation using standard EDA tools.Develop and implement low -power DFT architecture and infrastructure.Generate structural test vectors, analyse, and improve coverage, test time and test cost.Perform pre/post -layout scan and MBIST simulations.Work with...

  • Staff Engineer

    2 weeks ago


    Singapore Infineon Technologies AG Full time

    We are in search of an Engineer who will be responsible for generating Design for Test (DFT) instruments utilizing advanced Electronic Design Automation (EDA) tools. This role will involve working with various DFT instruments, including Memory Built-In Self-Test (MBIST), On-Chip Clock Controller (OCC), Test Access Port (TAP) controller, Boundary Scan, Logic...

  • DFT Engineer

    21 hours ago


    Singapore, Uni Connect Full time $90,000 - $120,000 per year

    Responsible for scan insertion, MBIST, ATPG for SOC based design using industry standard EDA tools.Generate test vectors, analyze and improve test coverage, reduce test time and test cost.Perform pre/post-layout scan and MBIST simulations.Work with designers on STA, physical, power and logical issues related to DFT.Work with test engineers to bring up all...

  • Dft Engineer

    2 days ago


    Singapore SUPREMICRO TECHNOLOGIES PTE. LTD. Full time

    **Job Description**: - Design/verification for Clock/JTAG/Analog/DFT IP - Scan Insertion, ATPG, scan verification and pattern generation - Memory BIST insertion, validation and pattern generation - Analysis of Functional Design for Testability, including product functionality and access through external connections, BIST and Board Level Diagnostics, control...

  • DFT Engineer

    1 week ago


    Singapore Silicon Labs Full time $60,000 - $120,000 per year

    Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world's most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity...