Design Verification Engineer
6 hours ago
Responsibilities: Perform chip verification for new product development. Participate in IP- and system-level simulation verification. Develop and maintain UVM-based verification environments according to architectural documentation. Define and achieve functional coverage targets; improve code and functional coverage based on the verification plan. Execute verification across gate-level and post-simulation stages; debug issues, resolve cases, and ensure verification tasks are completed at each project milestone. Support validation requirements and contribute to successful tape-out. Qualifications: M.S. in Electrical Engineering, Microelectronics, or related field. 3+ years of experience in Pre-Silicon verification. Solid knowledge of UVM methodology (strong advantage). Proficiency in Verilog/System Verilog. Strong scripting skills in at least one language: Python, Perl, Tcl, or Shell (required). Experience with chip CP/FT test preferred. Bilingual is the must to deal with non-English spoken colleagues. #J-18808-Ljbffr
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Design Verification Engineer
3 days ago
Singapore OmniVision Technologies Singapore Pte. Full timePosition Overview:As design verification engineer, you would be part of a passionate verification team that is constantly pushing the limits developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification. The goal is...
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Design Verification Engineer
4 days ago
Singapore Omnivision Full timeDescription Description: As a design verification engineer, you will be part of a passionate verification team that is constantly pushing the limits – developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification....
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Design Verification Engineer
1 week ago
Singapore BITSILICA PTE. LTD. Full time**Design Verification Engineer** Experience : 4+ Years Salary Range :SGD 6500-8500 **Skills Required**: FPGA SoC Verification Skills ASIC SoC Verification Skills System Verilog and UVM Skills Automation Skills. IP Verification Skills Low power UPF based verification skills **Technical Expertise** Languages :Verilog, System Verilog, C,...
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Design Verification Engineer
1 day ago
Singapore ETHOS SEARCH ASSOCIATES PTE. LTD. Full time**This will be a permanent position based in Jurong East **Scope of Work** - Produce detailed module level and SoC level testplans - Create ASIC verification environment (stimulus, checkers, assertions, monitors and scoreboards). - Produce directed and constrain-random verification functional tests - Run simulation using EDA tools to verify functional spec...
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ASIC Design Verification Engineer
6 hours ago
Singapore TetraMem INC Full timeCollaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verification Build and maintain infrastructure/environment for automation verification of SoC architecture, function and performance Develop reusable testbench, constrained-random/directed test cases, and verification associated...
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ASIC Design Verification Engineer
3 days ago
Venture Dr, Singapore TetraMem Full timeJob DescriptionCollaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verificationBuild and maintain infrastructure/environment for automation verification of SoC architecture, function and performanceDevelop reusable testbench, constrained-random/directed test cases, and verification...
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Staff Design Verification Engineer
1 week ago
Singapore Silicon Labs Careers Full time- About the Team The Digital Subsystems team is responsible for the research and development of digital architectures and IPs from concept to production. We develop compute engines (AI/ML), processors (RISC-V), accelerators, peripherals and system IP. Our activities include advanced research & development, high-level modeling, architecture, RTL design,...
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Asic Design Engineer
1 week ago
Singapore Recruit Expert Full time**Responsibilities**: - Work closely with design engineers and architects to define, document and implement detailed test plans for the SoC design verification. - Create and maintain infrastructure/environment for automation verification of SoC architecture, function and performance. - Build reusable testbench, constrained-random/directed test cases, and...
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Senior Design Verification Engineer
1 week ago
Singapore GMP Group Full timePerform design verification & validation of new products for medical and other mission-critical systems - Analyze the products and design specifications to create reliable and thorough verification procedures to determine if the products’ functionality work as intended with all the verification results clearly documented within the official verification...
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(Sr./Staff) Design Verification Engineer
6 hours ago
Singapore OmniVision Technologies Singapore Pte. Ltd. Full timeAbout the job (Sr./Staff) Design Verification Engineer Position Overview: As design verification engineer, you would be part of a passionate verification team that is constantly pushing the limits developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to...