IC Verification Engineer

Digital IC Design Verification Perform front-end verification using UVM methodology Work with Systems and Software engineers on FPGA verification Lead DFT related activities - Scan Insertion, ATPG, Pattern Validation Work with test team in debugging production test issues Help debug & correct any functional issues found in taped-out devices Participate in...

JOB DESCRIPTION: - Perform with various activities on RTL design implementation and verification at SoC level. - Responsible for RTL coding, logical synthesis, functional test plan, test bench development, RTL and gate-level simulation/verification, code coverage, formal verification, test vector generation and design documentation. - Work and provide high...

Overview Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches and test programmes using UVM-SV for Pre-Silicon IP/ICs/SOCs and ensure product meet their performance Implement coverage matrix using cover point and assertion Create and debug tests for DUT...

**Job Descriptions** - Develop and Review Test Plan based on IC design specification - Develop constrained-Random verification environment for complex DUT - Develop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCs - Implement coverage matrix using cover point and assertion - Create and debug tests for DUT - Resolve bugs with remote...

Job Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches and test programmes using UVM-SV for Pre-Silicon IP/ICs/SOCs and ensure product meet their performance Implement coverage matrix using cover point and assertion Create and debug tests...

**Job Descriptions** - Develop and Review Test Plan based on IC design specification - Develop constrained-Random verification environment for complex DUT - Develop/Modify Testbenches and test programmes using UVM-SV for Pre-Silicon IP/ICs/SOCs and ensure product meet their performance - Implement coverage matrix using cover point and assertion - Create and...

Department: IC Design & Development Position Summary: Key Responsibilities Perform front-end verification using UVM methodology Work with Systems and Software engineers on FPGA verification Lead DFT related activities – Scan Insertion, ATPG, Pattern Validation Work with test team in debugging production test issues Help debug & correct any functional...

**About the team** You will be part of our IC Lab team based in our Singapore regional HQ office. **How you will stand out**: - Experience in UVM verification methodology - Experience in developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, and system emulation to...

Responsibilities Develop and implement comprehensive verification plans for IP and SoC levels. Architect and build reusable testbenches and verification environments using UVM (Universal Verification Methodology). Create directed and constrained-random tests to identify design bugs. Develop functional coverage and assertion checks to ensure verification...

Overview About the Role Zero-Error Systems (ZES) is currently seeking a Junior Analog Integrated Circuit (IC) Designer to join our team and help us revolutionize the industry. The Analog IC Designer will work with the team on different analog IC designs for various applications including commercial, automotive and space. Responsibilities Development of...