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Senior Low Power DFT Architect
3 weeks ago
Low-Power DFT Engineer
We're seeking an experienced Digital Forensic Test engineer to develop and implement low-power architectures.
- Develop structural test vectors, analyze, and improve coverage, test time, and test cost.
- Generate and implement hierarchical DFT architecture in complex SoC.
- Work with designers on STA, physical, power, and logical issues related to DFT.
Requirements:
- BS/MS in ECE/EE and at least 10 years of experience in DFT implementation.
- Skilled in different types of DFT structures, including scan (Stuck-At, At-Speed, Path-Delay), scan compression, boundary scan, and MBIST.
What We Offer:
- Opportunities to work on complex, meaningful projects that will create a lasting impact.
- A collaborative environment where innovation and creativity thrive.