Digital Design Verification Lead

22 hours ago


Singapore beBeeVerification Full time $90,000 - $120,000
Design Verification Manager

We are seeking a highly skilled and experienced Design Verification Manager to join our team. As a Design Verification Manager, you will be responsible for leading the verification process for complex digital designs.

Responsibilities:
  • Capture and execute thorough test plans in an iterative and collaborative environment.
  • Develop and deploy state-of-the-art verification methodologies in increasing design complexities.
  • Conduct reviews of test plans and ensure timely execution with high-quality results.
Requirements:
  • Strong knowledge of SoC design principles, including IP block integration and system-level verification.
  • Experience with test plan development, execution, and analysis.
  • Familiarity with EDA tools and development flows for ASIC verification.
  • Highly disciplined, quality-minded, and highly driven for excellence.
  • Excellent team leadership and communication skills.
  • Strong expertise in UVM verification methodology.
  • Experience in C and/or a scripting language such as Python or Perl.
  • MSEE/BSEE in Electrical Engineering or Computer Engineering, with at least 10 years of relevant experience.
  • Experience in RTL design is a plus.
  • Experience in video processing and video analytics is a plus.
  • Passionate and strong in general programming is a plus.


  • Singapore beBeeVerification Full time $80,000 - $120,000

    We are seeking a highly skilled professional to lead our verification efforts for digital designs. The successful candidate will be responsible for developing and executing comprehensive verification plans.">">Job Responsibilities:">Developing and executing verification plans for digital designs">Ensuring the quality and reliability of products through...


  • Singapore NUWAY CFR PTE. LTD. Full time

    Roles & ResponsibilitiesOne of our US Global Semiconductor IC design is growing their design teams in Singapore.Role : Design Verification Lead (DV)Location : SingaporeExperience : 10+ years· Technical Requirements:o Expert-level UVM and SystemVerilog verificationo Advanced coverage-driven verification methodologieso Experience with complex SoC verification...


  • Singapore NUWAY CFR PTE. LTD. Full time

    One of our US Global Semiconductor IC design is growing their design teams in Singapore. Role : Design Verification Lead (DV) Location : Singapore Experience : 10+ years - **Technical Requirements**: - Expert-level UVM and SystemVerilog verification - Advanced coverage-driven verification methodologies - Experience with complex SoC verification...


  • Singapore Silicon Labs Careers Full time

    - About the Team The Digital Subsystems team is responsible for the research and development of digital architectures and IPs from concept to production. We develop compute engines (AI/ML), processors (RISC-V), accelerators, peripherals and system IP. Our activities include advanced research & development, high-level modeling, architecture, RTL design,...


  • Singapore beBeeVerification Full time $120,000 - $200,000

    IC Design Verification ExpertThis role plays a crucial part in the development of electronic devices. We are seeking an experienced IC Design Verification Specialist to join our team.Main Responsibilities:Lead digital IC design verification using UVM methodology to ensure integrity.Collaborate with Systems and Software engineers on FPGA verification for...


  • Singapore beBeeVerification Full time $90,000 - $120,000

    Job Title:Senior Digital Design Verification SpecialistJob Description:The Role of Semiconductor Design Verification Engineer Involves Thoroughly Understanding Digital Design Specifications Of Various IP Blocks And Soc Architecture Definition.Develop ASIC Verification Environments Including Stimulus, Checkers, Assertions, Monitors, And Scoreboards.Develop...


  • Singapore beBeeVerification Full time $150,000 - $200,000

    Job OverviewAs a Senior Engineer, you will play a pivotal role in the digital IC design verification process. Your expertise in front-end verification using UVM methodology and collaboration with Systems and Software engineers on FPGA verification will drive innovation and excellence.Key Responsibilities include:Digital IC Design VerificationFront-end...


  • Singapore beBeeVerification Full time $120,000 - $200,000

    Key ResponsibilitiesDevelop and Review Test Plans based on IC design specifications to ensure comprehensive coverage. Design and implement constrained-Random verification environments for complex digital systems. Utilize UVM-SV to develop and modify testbenches and test programs for Pre-Silicon IP/ICs/SOCs, ensuring product performance. Implement coverage...


  • Singapore beBeeVerification Full time $80,000 - $120,000

    Job TitleAs a seasoned digital verification specialist, you will be responsible for developing test plans for various IP blocks and SoC architecture.Key Responsibilities:Develop module-level and SoC-level test plans based on design specifications.Create ASIC verification environments, including stimulus, checkers, assertions, monitors, and scoreboards.Design...


  • Singapore beBeeVerificationEngineer Full time $120,000 - $180,000

    Job SummaryWe are seeking an experienced IC Design Engineer to join our team.The ideal candidate will have a strong understanding of digital IC design and verification, with experience in developing and implementing test plans and verification environments using SystemVerilog/UVM.The successful candidate will be responsible for designing and implementing...