
Digital IC Verification Expert
5 days ago
As a Senior Engineer, you will play a pivotal role in the digital IC design verification process. Your expertise in front-end verification using UVM methodology and collaboration with Systems and Software engineers on FPGA verification will drive innovation and excellence.
Key Responsibilities include:
- Digital IC Design Verification
- Front-end Verification using UVM Methodology
- FPGA Verification
- DFT Related Activities
- Test Team Collaboration
- Design Reviews and Documentation
Requirements and Qualifications
The ideal candidate should possess a Degree or Master in Electrical/Electronic Engineering, with at least 5 years of experience in digital IC design verification. Strong working knowledge of SystemVerilog, OVM/UVM verification methodology, DFT, ATPG, and EDA tools from Cadence, Synopsys is essential. Additionally, familiarity with Digital and mixed-signal design, USB interface products, connectivity technology such as USB, UART, SPI, I2C, and Project Management is highly desirable.
Benefits
This role offers an excellent opportunity for career growth and development in a dynamic environment. The successful candidate will have the chance to work on cutting-edge projects, collaborate with a talented team, and contribute to the company's success.
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