Senior Backend Engineer for Metal Interconnects and Wafer-to-Wafer Bonding

2 days ago


Singapore MICRON SEMICONDUCTOR ASIA OPERATIONS PTE. LTD. Full time
Job Summary

We are seeking a highly skilled Senior Backend Engineer to join our team at Micron Semiconductor Asia Operations PTE. LTD. as a DDQA (Development and Design Quality Assurance) Backend of Line Reliability Senior Engineer. In this role, you will be responsible for developing and optimizing quality and reliability criteria related to Metal Interconnects and Wafer-to-Wafer Bonding (W2W) process for the next generation of Micron's memory parts.

Key Responsibilities
  • Define and implement reliability test methodologies for new Metal Interconnects and Hybrid Memory process (PWF=Post Wafer Finish/W2W bonding) for the next generation of Micron's memory parts.
  • Drive dielectric and W2W Bonding technology roadmaps from Product Quality and Reliability perspective.
  • Ensure the device is compliant with Package Level and Wafer Level process Reliability Qualification requirements.
  • Collaborate with Technology Development to define the BEOL reliability strategy based on the Process Roadmap.
  • Provide periodic updates to stakeholders on project status, progress, and roadblocks/opportunities.
  • Support technology transfer to production facilities.
  • Partner with multiple stakeholders in Process Conversion Review Board Meeting (PCRB) to improve coverage from various aspects of product quality and reliability.
  • Identify gaps and drive initiatives/programs/business process to build margin around structural, electrical, and reliability performance.
  • Partner with Technology Development on latest products and technologies and define quality and reliability fail modes especially NUDD (New, Unique, Different, Difficult) with goal to mitigate risk and achieve high quality materials.
  • Build Product Fail Modes Repository based on NUDD (proactive) and previous issues (reactive), and work with key stakeholders to prevent issues or implement effective detections controls and containment.
Requirements
  • 3+ years' experience in semiconductor related engineering.
  • A Process Engineering or Integration or Assembly & Test background and experience.
  • Hands-on experience on Backend of Line Metal Interconnects process (Cu, Al, TSV, Dielectrics) from any Process Module or Process Integration, or Metal Reliability testing (electromigration, High Temperature Storage etc) is strongly desired.
  • Knowledge or exposure in Wafer-to-Wafer Bonding technology and failure mode is a strong plus.
  • Must possess engineering knowledge of semiconductor processes. Knowledge of NAND Fab processes, flow and fail modes is preferred.
  • Highly skilled at problem-solving activity and capability of leading cross-functional team.
  • Understanding on technical risk assessment, FMEA, and 8D methodology for root cause analysis and problem solving.
  • Effective verbal and written communication skills in English.
  • Good multitasking skills and ability to set priorities in a fast-moving, dynamic environment.
  • Ability to work independently, with minimal direction, and a focus on meeting commitments.
  • Real passion for improving product quality to increase customer satisfaction.


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