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Senior Semiconductor Design Verification Specialist
3 weeks ago
Responsibilities:
- Define next-generation verification methodologies, ensuring seamless integration with existing flows.
- Drive chip level physical verification sign-off and closure, guaranteeing compliance with industry standards.
- Perform DRC (Design Rule Checking), LVS (Layout vs. Schematic), PERC (Programmable Electrical Rule Check) verification, and Fill insertion to ensure robust designs.
- Debug and resolve complex verification issues, providing expertise to junior engineers.
- Interface with foundries for rule deck updates and violation waivers, fostering collaborative relationships.
- Develop and maintain verification runsets and methodologies, embracing innovation in tooling and methodologies.
- Support technology file development and qualification, ensuring alignment with evolving technologies.
- Mentor junior engineers on physical verification methodologies and closure, promoting knowledge transfer.
Qualifications:
- Strong understanding of physical verification principles and methodologies.
- Proficiency in industry-standard EDA tools for verification and design.
- Experience working with complex semiconductor designs and verification processes.
- Excellent collaboration and communication skills, with ability to mentor junior engineers.
- Ability to adapt to changing priorities and deadlines, with a focus on delivering high-quality results.
Benefits:
As a member of our team, you will be part of a dynamic environment that fosters growth, innovation, and excellence. We offer opportunities for professional development, teamwork, and recognition of outstanding performance.
