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Senior Hardware Engineer

1 week ago

Singapore NTU (Nanyang Technology University- Main Office-HR) Full time
Company Overview:
Nanyang Technological University (NTU) is a leading research-intensive university in Singapore. Our School of Electrical and Electronic Engineering is one of the founding schools, built on a culture of excellence and renowned for high academic standards and research.

The School has over 3,000 undergraduate students and 1,000 graduate students, making it one of the largest EEE schools in the world. We rank 10th in the field of Electrical & Electronic Engineering in the QS World University Rankings by Subjects.

We nurture competent engineers and researchers, graduating over a thousand students each year who are ready to take on great ambitions and challenges.

About the Role:
We are looking for a highly skilled Research Associate with experience in RISC-V architecture. The successful candidate will be responsible for adding a Hardware AES and ASCON Accelerator to the RISC-V CVA6 core.

Key Responsibilities:
  • Design and Implementation:
    • Integrate a Hardware AES Accelerator and ASCON Lightweight Cryptography Accelerator into the RISC-V CVA6 (Ariane) core.
    • Implement memory-mapped interfaces or custom instructions for the accelerators to interface with the CVA6 core.
    • Collaborate on the integration of the accelerators into the core's execution pipeline.
  • RISC-V ISA Extension:
    • Define and implement custom RISC-V instructions to utilize the AES and ASCON hardware accelerators, if needed.
    • Modify the RISC-V CVA6 decode and execution stages to handle the new cryptographic instructions.
    • Work out the toolchain to ensure assembler, compiler, and simulation support for the custom instructions.
  • Verification and Testing:
    • Conduct simulations to evaluate the performance, latency, and throughput of the accelerators within the CVA6 pipeline.
    • Work closely with the AES and ASCON accelerator design team to ensure proper testing and debugging of the hardware integration.