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Digital IC Design Expert
2 weeks ago
We are seeking a Senior Verification Engineer to join our team. The ideal candidate will have extensive experience in digital IC design verification and will be responsible for performing front-end verification using UVM methodology.
The successful candidate will work closely with Systems and Software engineers on FPGA verification, lead DFT related activities - Scan Insertion, ATPG, Pattern Validation, and collaborate with the test team in debugging production test issues.
- Develop and execute verification plans and strategies to ensure high-quality designs.
- Work collaboratively with cross-functional teams to identify and resolve design issues.
- Participate in design reviews and contribute to the development of technical documentation.
Additional responsibilities include:
a) Any reasonable task assigned by management and deemed to be within the individual's capabilities to ensure smooth running of the business.
b) As this is an evolving business, ongoing change is an integral part of the position. Management will liaise with the individual on any fundamental change to work practices. The individual is required to embrace and adopt any change to working practices.
Knowledge and skill requirements include:
- Degree/Master in Electrical/Electronic Engineering.
- 5 years or above experience in the area of digital IC design verification.
- Working experience from design to tape-out are essential.
- Experience in SystemVerilog, OVM/UVM verification methodology, DFT, ATPG.
- Experience in using EDA tools from Cadence, Synopsys.
- Knowledge and working experience in one or more of the following:
Digital and mixed-signal design
USB interface products
Knowledge in connectivity technology such as USB, UART, SPI, I2C
Project Management
Key skills include ISO, EDA, UVM, Project Management, FPGA, SystemVerilog, Cadence, DFT, Debugging, IC, Atpg.