Digital IC Design Engineer
19 hours ago
Key Responsibilities:
• Contribute to RTL design of SoC modules and assist in IP core integration.
• Support chip-level system design tasks, including clock/reset architecture, low-power design techniques, and bus architecture.
• Collaborate with verification and testing teams to perform module-level and system-level validation.
• Assist front-end engineers in netlist delivery and help resolve timing issues.
• Provide support for driver development, debugging, and technical documentation.
Requirements:
• Bachelor's degree or higher in Electrical Engineering (or equivalent).
• 1 to 5 years of relevant experience in digital IC/ASIC design.
• Strong understanding of digital circuit fundamentals and proficiency in Verilog HDL.
• Familiarity with ASIC design flow and EDA tools (e.g., Synopsys, Cadence).
• Basic understanding of CPU and Cache architectures, instruction set architectures (ISA), and compiler principles.
• Knowledge of bus systems, DMA, and peripheral interface design.
• Awareness of low-power design methodologies.
Preferred Qualifications:
• Internship or project experience in SoC or ASIC design.
• Familiarity with standard bus protocols (e.g., AMBA, AXI, AHB, APB).
• Exposure to synthesis, timing analysis, or DFT concepts.
• Good problem-solving skills and eagerness to learn in a collaborative environment.
• Strong communication skills and ability to document technical work clearly.
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