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Senior Image Signal Processing Architect
3 weeks ago
Image Signal Processing Architect
Job Description:
We are seeking a highly skilled Image Signal Processing (ISP) Architect to join our team. As an ISP Architect, you will be responsible for designing and implementing advanced ISP algorithms into hardware using Verilog, SystemVerilog, and/or SystemC.
Key Responsibilities:
- Define ISP HW Architecture based on product features and performance requirements, including gate count and power estimation.
- Verify Logic at ISP level and Digital System level.
- Optimize Design for less gate count and low power consumption.
- Drive ISP Design activities in close collaboration with Algorithm Team, Design leaders in other sites, and Digital System Design Team.
- Lead, supervise, and mentor a team of RTL design engineers.
Requirements:
- Minimum MSEE or BSEE degree, plus 7+ years of digital design and verification related experience.
- 3+ years project management/people management experience/skill.
- Experience/knowledge in CMOS Image Sensor and image signal processing (ISP).
- Experience/knowledge in System C/C++, System Verilog, and Catapult HLS tool.
- Ability to lead teams and collaborate effectively with people in different functions.
- Strong time management skills to ensure timely completion of deliverables.
- Good communication and interpersonal skills.
- Result-oriented and embrace change behaviours.
