Next Generation NAND Technology Specialist

1 week ago

Singapore beBeeNAND Full time $180,000 - $250,000
Senior Engineer for Advanced NAND Development

We are seeking an experienced Senior Engineer to drive the development of next-generation Advanced NAND technologies. This is a critical role in our technology development team, and the successful candidate will be responsible for defining, implementing, and coordinating effective actions to enable multiple projects to hit key achievements and timelines.

Key Responsibilities:

  • Develop and maintain design rules and specifications for R&D and production designs;
  • Drive delivery of key milestones starting from project kick-off until end-of-life;
  • Collaborate with stakeholders across the organization to direct development efforts for new Advanced NAND generations;
  • Ensure quality of Design Rule Checks (DRCs) released and proper documentation;
  • Work with Yield Enhancement, Product Engineers, Defect Analysis, and Quality Assurance teams to understand process issues related to database layout and prioritize development of solutions with Process Integration, Advanced Mask Design, Scribe & Frame, Layout & Design;
  • Help design and evaluate test structures to provide data for next-generation devices and quantify process margin on current devices;
  • Summarize complex problems, derive, and explain actions taken to address them;
  • Drive effective multi-functional communication on issue resolution and support across node Design Rule alignment;
  • Define sub-milestones for the project within the layout schedule and work with various teams to achieve targets and timelines;
  • Ensure best possible communication between NAND Design Rule and other key stakeholders;
  • Enthusiastically identify and address process issues and process window vs. die size conflicts stemming from specific database layout or layout techniques;
  • Assure timely documentation and feedback of R&D activities regarding design rule improvements to production parts still in design phase.

Requirements:

  • 5+ years of experience in semiconductor industry in areas of Process Integration, Yield Enhancement, Product Engineering, Test Structure Development, or Unit Process Development;
  • Exposure to design & layout, ability to do minor layout, and experience with CAD tools like Cadence Virtuoso, K2view, and Mentor Graphics DRV/RVE highly desired;
  • Proven capability to successfully resolve sophisticated issues;
  • Understanding of Advanced NAND process flow and major NAND components such as BL sensing, Word-line driver, CMOS under array, etc.
  • Familiarity with CAD group interactions, data post-processing, and process of transferring data from database to reticle.

Education:

Master's Degree or higher in Electrical Engineering, Microelectronics, Physics, or related field with 5 years of experience in semiconductor industry or Bachelor's Degree plus 8 years' experience considered.

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