Electrical and Electronic Engineering Expert

2 days ago


Singapore NTU (Nanyang Technology University- Main Office-HR) Full time
Nanyang Technological University

Our School of Electrical and Electronic Engineering is a leading institution in the field of Electrical & Electronic Engineering. With a strong emphasis on research and innovation, we have established ourselves as a world-renowned centre of excellence.

As part of our mission to nurture competent engineers and researchers, we are seeking a highly skilled Research Associate with experience in RISC-V architecture. The successful candidate will be responsible for adding a Hardware AES and ASCON Accelerator to the RISC-V CVA6 core. This role requires deep knowledge of hardware design, cryptographic algorithms, and the RISC-V instruction set architecture (ISA).

Responsibilities:
  • To integrate a Hardware AES Accelerator and ASCON Lightweight Cryptography Accelerator into the RISC-V CVA6 (Ariane) core.
  • To implement memory-mapped interfaces or custom instructions for the accelerators to interface with the CVA6 core.
  • To collaborate on the integration of the accelerators into the core's execution pipeline.
Extension of RISC-V Instruction Set:
  • To define and implement custom RISC-V instructions to utilize the AES and ASCON hardware accelerators, if needed.
  • To modify the RISC-V CVA6 decode and execution stages to handle the new cryptographic instructions.
  • To work out the toolchain to ensure assembler, compiler, and simulation support for the custom instructions.
Testing and Validation:
  • To conduct simulations to evaluate the performance, latency, and throughput of the accelerators within the CVA6 pipeline.
  • To work closely with the AES and ASCON accelerator design team to ensure proper testing and debugging of the hardware integration.
Qualifications:
  • Masters degree in Electrical Engineering, Computer Engineering, or a related field.
  • Proven experience with RISC-V architecture, especially with custom instruction extensions and pipeline modifications.
  • Proficiency in HDL languages (Verilog, VHDL, or SystemVerilog) and RTL design.
  • Proficiency in toolchain modification, including the ability to extend assemblers and compilers (GCC, LLVM) for custom hardware instructions.
  • Proficiency of FPGA development tools such as Vivado, Quartus, or similar for prototyping.
Prioritized Knowledge:
  • Strong understanding of ASIC/FPGA design flows, including synthesis, place and route, and timing closure.
  • Experience in cryptography and implementing cryptographic algorithms in hardware (AES, ASCON, etc.).


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