Senior Design Verification Engineer

1 month ago


Singapur, Singapore Ambiq Full time

Ambiq Micro's Mission:

Ambiq Micro is a leading developer of ultra-low power semiconductor solutions. Our mission is to enable intelligent devices everywhere by developing innovative technologies that drive a more energy-efficient, sustainable, and data-driven world.

Job Summary:

We are seeking an experienced Staff Design Verification Engineer to join our dynamic team in Austin, TX. The ideal candidate will have 8-12 years of experience in semiconductor design verification and a proven track record of success in developing and executing verification plans for complex SoC designs.

Responsibilities:

  • Verification of digital and mixed-signal designs, including systems-on-chip with multiple CPUs, and digital signal processors, security hardware, and other logic for IoT applications.
  • Participate in all phases of chip development, from creating test plans, creating testbench environment (SV/UVM), integrate VIP's, automate test env for randomized testing and score boarding.
  • Utilize UVM to create drivers, monitors, predictors, and scoreboards.
  • Responsible for verification of block(s) that includes writing tests, assertion and coverage for a block.
  • Create tests to achieve coverage goals while verifying functionality.
  • Develop support utilities for verification automation, test bench automation, regression, to improve productivity.
  • Develop tests to evaluate power and performance aspects of the design.
  • Perform gate-level-simulations and participate in supporting FPGA and Post-silicon bring-up.

Requirements:

  • BSEE/MSEE Degree 8-12 years of experience at block, sub-system and full-chip verification.
  • Strong in understanding multiple architectures, integrate 3rd party IP's/VIP's, have worked with mixed-signal designs with low-power design and verification challenges.
  • Experience with System Verilog simulation required.
  • Strong understanding/exposure to Design Verification for low-power battery operated designs highly desired.
  • C based verification in an SoC environment is required.
  • Experience with ARM processor-based designs and low-power design techniques is a plus.
  • Languages:SystemVerilog (UVM), Verilog, C/C++, Python, Makefile
  • Technologies: ARM SoC (Preferred), AMBA AXI/AHB/APB, DMA, Flow Control, Serial Devices, QoS
  • Preferred technologies: MIPI(CSI/DSI), Crypto, OTP, DSP, Low-Power


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