
Senior / Staff Physical Verification CAD Engineer
4 weeks ago
We are looking for result-driven candidates who would thrive under a fast-pace working environment and having a strong desire to make an impact in their organization.
Job Description:
- Co-work with PDK team to code and maintain DRC / LVS / ANT / ERC / LPE / ESD rule deck for various processes
- Develop layout implementation flow and physical verification flow
- Co-work with QA team to reduce the PDKs/Rule deck defect
- Perform full-chip physical verification such as debugging DRC / LVS / ERC
- Implement automation scripts in C-shell, Python and Perl
Job requirements:
- Bachelor / Master's Degree in Electrical / Electronics Engineering / Computer Science
- Familiar with IC Design front-to-backend flow
- Familiar with interposer design, TSV technology and chip stacking techniques such as CoWoS or EMIB with 2.5D and 3D ICs experiences. (Must have)
- Preferably well-versed in Calibre, ICV
- Proficient in script programming, such as, Tcl, Perl or C-shell
- Proficient in UNIX (Linux) platforms
- Strong communication skills, problem solving and analytical skills
PERSOLKELLY Singapore Pte Ltd
• RCB No. 200007268E EA License No. 01C4394
• EA Registration No. R21103542 (Ling Kai Jin)
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Tell employers what skills you havePerl
Analytical Skills
Problem Solving
Unix
Electrical
3D
LVS
DRC
Python
Communication Skills
Debugging
IC
Layout
Linux
Electronics
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