Staff / Senior SerDes Digital Engineer
4 days ago
Job Descriptions:
- Participate in high-level product specifications, microarchitecture and implementation of high-speed memory interfaces
- Perform RTL coding, LINT checking and sanity testing on implemented designs
- Work with the verification team for lab debugging
- Work with the software team and/or customers to solve problems, debug and tune system performance
Job Requirements:
- Bachelor's degree in communications, electronic engineering or computer engineering, master’s degree preferred
- More than 6 years (staff engineer) and 10 years (senior staff engineer) of ASIC design experience, familiar with ASIC development process
- Good Verilog HDL coding skills and EDA tools such as synthesis and timing analysis
- Familiarity with high-speed interfaces such as DDR, SerDes, PCIe is preferred
- Ability to solve customer problems and deliver results in a timely manner
- Strong organizational and communication skills where English is a must and Chinese is preferred
HOW TO APPLY:
Interested applicants, kindly send your resume to thea.cheah@masonac.com
We regret only shortlisted candidates will be notified.
Important Note: Mason & Co is committed to safeguarding your personal data in accordance with the Personal Data Protection Act (PDPA).
Mason & Co Pte Ltd
EA License No: 19C9622
EA Personnel: Cheah Wei Xuan (Thea)
EA Personnel Reg No: R23118878
Tell employers what skills you have
PCIe
HDL
RTL Coding
SERDES
Job Descriptions
EDA
RTL Design
Communication Skills
ASIC
Debugging
Verilog
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