SerDes Analog Design
4 days ago
Job Descriptions:
1. Participate in high-level product specifications, microarchitecture and implementation of high-speed memory interfaces
2. Responsible for delivery of AMS circuits in SerDes, including the evaluation of different circuit topologies
3. Worked on high-speed serial and parallel interface design, defining specifications and implementing modules such as bandgap, bias circuits, LDO regulators, amplifiers, comparators, switched capacitor circuits, ADCs, DACs, oscillators, filters, Tx/Rx equalization techniques and circuits such as de emphasis, CTLE, DFE, CDR architecture and implementation, high-speed digital circuits (serializers, deserializers, counters, dividers, etc.)
4. Work with the verification team for lab debugging
5. Work with the software team and/or customers to solve problems, debug and tune system performance
Job Requirements:
1. Bachelor's degree in communications, electronic engineering or computer engineering, master’s degree preferred
2. More than 4 years (senior engineer) and 6 years (staff engineer) of ASIC design experience, familiar with ASIC development process
3. Good AMS circuit design skills and EDA tools such as Cadence Virtuoso, Calibre, Hspice/Spectre, and static timing analysis tools (e.g., Nanotime)
4. Familiarity with high-speed interfaces such as DDR, SerDes, PCIe is preferred
5. Ability to solve customer problems and deliver results in a timely manner
6. Strong organizational and communication skills where English is a must and Chinese is preferred
HOW TO APPLY:
Interested applicants, kindly send your resume to thea.cheah@masonac.com
We regret only shortlisted candidates will be notified.
Important Note: Mason & Co is committed to safeguarding your personal data in accordance with the Personal Data Protection Act (PDPA).
Mason & Co Pte Ltd
EA License No: 19C9622
EA Personnel: Cheah Wei Xuan (Thea)
EA Personnel Reg No: R23118878
Tell employers what skills you have
Modeling
Analog
Analog Circuits
Circuit Design
EDA
CMOS
ASIC
Cadence Virtuoso
Debugging
IC
Electrical Engineering
Layout
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