Senior / Principal DFT Engineer
2 weeks ago
Job Description Position of Senior DFT engineer We are seeking a highly motivated Design-for-Test (DFT) Engineer to join our SoC/ASIC DFT development team. The successful candidate will be responsible for implementing, and verifying DFT solutions across complex hierarchical designs. This position involves hands‑on work in DFT insertion, and comprehensive DFT verification to ensure first-pass silicon success. You will collaborate closely with Physical design team, ATE test teams to develop efficient, high-quality test strategies aligned with industry standards. Key Responsibilities Develop and implement DFT architectures for hierarchical SoC and ASIC designs, including both block‑level and top‑level DFT integration. Perform scan insertion, test point insertion, and test compression using SSN or equivalent compression architectures. Validate Serial Stream Network (SSN) topology, managing scan chain balancing, clock domain crossings. Integrate Boundary scan (IEEE 1149.x) and other test access mechanisms for chip‑level testability. Generate and analyze ATPG patterns for stuck‑at, transition, and path delay faults to ensure optimal test coverage. Perform DFT verification, including verilog / gate level simulation. Work closely with cross‑functional teams to resolve DFT/testing timing challenges. Collaborate with ATE engineers to prepare and validate timing and pattern files (STIL/WGL) for tester compatibility and production readiness. Support silicon bring‑up, production test debugging through Diagnostics and failure analysis. Qualifications Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field. Minimum 3 years of experience in DFT design and verification (5+ years preferred for senior roles). Strong understanding of scan‑based test architectures, test compression, and hierarchical DFT implementation. Hands‑on experience with DFT tools such as Siemens Tessent. Proficiency in ATPG generation, fault coverage analysis, and gate‑level DFT verification. Familiarity with ATE test flows and pattern validation on platforms such as Advantest or Teradyne. Strong scripting skills in TCL, Perl, or Python for DFT automation. #J-18808-Ljbffr
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Senior / Principal DFT Engineer
2 weeks ago
Singapur, Singapore Broadcom Inc. Full timeSenior / Principal DFT Engineer page is loaded## Senior / Principal DFT Engineerlocations: Singapore-Yishuntime type: Full timeposted on: Posted Todayjob requisition id: R **Please Note:****1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)****2. If you already have a...
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Senior / Principal DFT Engineer
1 week ago
Singapur, Singapore AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED Full timeJob DescriptionPosition of Senior DFT engineer We are seeking a highly motivated Design-for-Test (DFT) Engineer to join our SoC/ASIC DFT development team.The successful candidate will be responsible for implementing, and verifying DFT solutions across complex hierarchical designs.This position involves hands-on work in DFT insertion, and comprehensive DFT...
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Senior / Principal DFT Engineer
2 weeks ago
Singapur, Singapore Broadcom Full timePosition of Senior DFT Engineer We are seeking a highly motivated Design-for-Test (DFT) Engineer to join our SoC/ASIC DFT development team. The successful candidate will be responsible for implementing, and verifying DFT solutions across complex hierarchical designs. This position involves hands‑on work in DFT insertion, and comprehensive DFT verification...
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Senior / Principal DFT Engineer
2 weeks ago
Singapur, Singapore Broadcom Full timeOverview Position of Senior DFT engineer We are seeking a highly motivated Design-for-Test (DFT) Engineer to join our SoC/ASIC DFT development team. The successful candidate will be responsible for implementing and verifying DFT solutions across complex hierarchical designs. This position involves hands-on work in DFT insertion and comprehensive DFT...
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Senior DFT Architect for SoC/ASIC Test
2 weeks ago
Singapur, Singapore Broadcom Inc. Full timeA leading technology company located in Singapore is seeking a Senior / Principal DFT Engineer to develop and implement DFT solutions for complex designs. The ideal candidate will have a strong background in DFT design and verification, with hands-on experience in relevant tools. This role offers the opportunity to collaborate closely with teams to ensure...
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Senior DFT Engineer: SoC/ASIC Test Architect
2 weeks ago
Singapur, Singapore AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED Full timeA leading semiconductor company based in Singapore is seeking a motivated Senior DFT Engineer to join their SoC/ASIC DFT development team. The role involves implementing and verifying DFT solutions to ensure first-pass silicon success. Key responsibilities include developing DFT architectures, validating testing strategies, and collaborating with...
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Senior DFT Engineer
2 weeks ago
Singapur, Singapore Broadcom Full timeA leading semiconductor company based in Singapore is seeking a highly motivated Senior DFT Engineer to join their SoC/ASIC DFT development team. This role involves hands-on work in DFT insertion and verification across complex designs. Candidates should have a Bachelor's or Master's degree in Electrical Engineering and at least 3 years of DFT experience....
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Senior DFT Engineer: SoC/ASIC Test Architect
2 weeks ago
Singapur, Singapore Avago Technologies International Sales Full timeA leading technology firm in Singapore is seeking a highly motivated Senior DFT Engineer. You will be responsible for implementing and verifying DFT solutions across complex designs, collaborating with teams to ensure high-quality test strategies. Ideal candidates will have a degree in Electrical Engineering and a minimum of 3 years of experience in DFT...
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Principal Physical Design Engineer
1 week ago
Singapur, Singapore MAXLINEAR ASIA SINGAPORE PRIVATE LIMITED Full timeJob Responsibilities:- Perform Design synthesis with Synopsys/Cadence toolset, with full knowledge and understanding of functional constraints Create timing constraints for functional, DFT modes for synthesis/STA by working closely with Design and DFT Engineers STA/timing closure Write Low power intent file (CPF/UPF) from specification and verifying...
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Senior Engineer/Principal Engineer
4 weeks ago
Singapur, Singapore DSTA Full timeSenior Engineer/Principal Engineer (Enterprise Compliance Platform) Join to apply for the Senior Engineer/Principal Engineer (Enterprise Compliance Platform) role at DSTA Senior Engineer/Principal Engineer (Enterprise Compliance Platform) 2 weeks ago Be among the first 25 applicants Join to apply for the Senior Engineer/Principal Engineer (Enterprise...
