Package Development Engineer

4 weeks ago


Singapore ByteDance Full time
Overview

Location: Singapore, Singapore.

Responsibilities
  • Provide chip packaging design solutions, including packaging selection, packaging design, packaging implementation, PinMap definition, and board-level interconnection.
  • Interface with chip designers and board-level designers to handle interface-related issues.
  • Responsible for signal integrity (SI) and power integrity (PI) analysis and optimization.
Qualifications
  • Minimum Qualifications: Master's degree or above in Microelectronics, Electronics, Communications, Computer Science, or related fields, with at least 2 years of relevant work experience.
  • Proficiency in EDA tools in the packaging and PISI (Power Integrity & Signal Integrity) fields.
  • Experience in undertaking PISI work for complex SoC chips, including high-speed interfaces such as DDR, PCIe, and Serdes.
  • Familiarity with packaging structures, reliability, thermal performance, and various high-speed/high-frequency interface protocols.
  • Preferred Qualifications: Strong teamwork spirit and a responsible work attitude.
  • Excellent communication skills, with fluent English reading and writing abilities.
Seniorit y level
  • Mid-Senior level
Employment type
  • Full-time
Job function
  • Engineering and Information Technology
Industries
  • Technology, Information and Internet
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