Layout Design Manager

Job Summary We are looking for a skilled Layout Design Manager to join our semiconductor design team in Singapore. You will be responsible for performing full-custom IC layout design, physical verification, and layout optimization for advanced FinFET technology nodes. This role involves close collaboration with circuit design engineers to deliver...

**Responsibilities**: - Manage a team of analog layout engineers, providing leadership, mentorship, and technical guidance. - Oversee the layout design, and verification in technologies such as CMOS etc. - Collaborate with design and PD teams to translate circuit designs into physical layouts. - Ensure the team meets project schedules and deliverables,...

**Job Summary**: We are looking for a skilled **Layout Design Expert**to join our semiconductor design team in Singapore. You will be responsible for performing full-custom IC layout design, physical verification, and layout optimization for advanced FinFET technology nodes. This role involves close collaboration with circuit design engineers to deliver...

**Responsibilities** - Working within an analog/mixed-signal design team based in Singapore, and collaborating with engineers in other locations. - Leading medium and high complexity ICs floor planning and top routing of all signals. - Using recommended layout and verification techniques, tools & flows to produce optimal designs. - Interacting with the...

The descriptions are for layout engineers for our Library Group. Library Group is a part of Central Engineering Group. In Library Group, we focus on circuit design for memory, I/O (Input/Output), and Standard Cells. **Requirements**: - Strong layout knowledge with a minimum of 3 to 4 years of experience - Skills include Cadence layout, Cadence schematic...

Requirements Bachelor's or Master's degree in Electrical Engineering or related field. Minimum of 8 years of experience in analog layout design with at least 3 years in a management or team lead role. Proficiency in industry-standard EDA tools such as Cadence Virtuoso and Calibre. Deep understanding of semiconductor physics, device fabrication processes, and...

**Key responsiblities**: - Work closely with circuit designers to deliver a compact block and one chip layout meeting to floorplan specification. - Create and modify physical layouts mainly for analog and mixed-signal integrated circuits. - Ensure that designs comply with foundry-specific rule like the DRC and LVS. - Work on layout optimization to minimize...

Overview The descriptions are for layout engineers for our Library Group. Library Group is a part of Central Engineering Group. In Library Group, we focus on circuit design for memory, I/O (Input/Output), and Standard Cells. Requirements Strong layout knowledge with a minimum of 2 to 3 years of experience Skills include Cadence layout, Cadence schematic...

Responsibility Responsible for layout planning and design of analog and mixed-signal circuit modules; Independently perform DRC, LVS, ERC, and other layout verification tasks; Work closely with analog circuit design engineers to ensure effective communication and layout optimization; Prepare and maintain relevant technical documentation. Requirement...

**Responsibilities**: - Develop digital and analog layout in various technologies (e.g., CMOS ) - Layout analog circuits and IO circuits - Analyse and rectify layout verification issues - Support the front-end team for System-on-Chip (SoC) integration **Requirements**: - Possess at least a bachelor’s degree or equivalent in Electrical & Electronic...