Staff Foundry Engineer

2 weeks ago

Toa Payoh, Singapore Silicon Labs Full time

**Who We Are**

**What the Team Does**

The Foundry Engineering team puts the silicon into Silicon Labs. We interface between silicon wafer foundries and our design and CAD groups to make sure we are using the right process technologies. We ensure that the options, technology files, and models are enhanced to ensure first time silicon success.

Our work falls into three areas:
1) bringing in new silicon process technologies,

2) guiding IC products through the design and qualification phases, and

3) maintaining high die yield and solving manufacturing problems.
**Summary**

We are looking for an engineer who is accountable and has initiative to solve challenging problems. You need to be able to dissect the problem, propose solutions, build a consensus on how to proceed, consider the constraints, and drive the execution, analysis, and implementation. If you are thorough, dedicated to quality, analytical, and enjoy collaborating with diverse team members, we want to hear from you.

In this role you will reinforce the team to support production operation, new process bring-up & NPI (New Product Introduction) development.

Not only will you be joining a highly-skilled and tight-knit team where every engineer makes a significant impact on the end product, we also strive for good work/life balance and to make our environment welcoming and fun.
**Responsibilities**
- Interface between operation teams and foundry suppliers for better communication and tackle logístical & technical issues.
- Timely resolve major yield excursions and proactively drive fab’s CIP (Continuous Improvement Plan) activities.
- Support new process bring-up through technology KPI assessment, as well as testchip design, tapeout & semiconductor device characterization.
- Support NPI development on resolving design obstacles, executing tape-out & wafer plans, prototype qual, and production launch & ramping.
**Education and/or Experience**:

- Master’s/ PhD degree in EE, Physics, Material Science or related. Minimum 5 years’ of relevant working experience.
- Deep understanding of device physics (e.g., MOS/BJT/MoM) and intrinsic reliability (e.g., TDDB/HCI/BTI/EM), wafer fab process integration (FEOL/BEOL), GDS tape-out and mask-making flows, and layout design rule methodology. Experience in advanced-node fab is a plus.
- Familiar with layout tools (Virtuoso), wafer-level probing system (prober/B1500), wafer DOE methodology, process control methodology (Cpk), data analysis tools (JMP), yield debug and FA techniques (pFA/eFA). Experience of advanced eNVM (RRAM/MRAM) evaluation/ characterization is a plus.
- Knowledge of IC chip development flow, basic analog/digital circuits concepts, ESD principles, package process and statistical theory.
- Good communication (verbal/written) skills and ability to work multi-tasks mode (including support multiple time-zone teams).
**Your Benefits & Perks**
- Employee Stock Purchase Program (ESPP)
- Medical and dental insurance coverage including spouse and child(ren)
- Bi yearly health screening and flu vaccination
- Office location is above Tai Seng MRT station
- We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status._

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