
Lead Systems Architect – Fault-Tolerant Quantum Computing
2 weeks ago
An overview of this role
This role focuses on designing and specifying the orchestration layer for large-scale, fault-tolerant quantum computers. You will help define how active quantum error correction (QEC) cycles, decoders, and control systems integrate into a coherent architecture that connects hardware, software, and HPC resources.
The role involves analysing Pauli frame propagation, designing I/O interfaces for syndrome decoders, implementing active QEC cycles on hardware testbeds, and evaluating FPGA-based control systems for performance improvements. You will also bring together the quantum node level (QPU, CPU, decoder) with higher-level orchestration across hybrid quantum–classical clusters. Success requires a strong physics background, systems-level thinking, and the ability to work with both quantum software and hardware.
What You will contribute
- Define orchestration requirements for active QEC in FTQC systems.
- Model Pauli frame propagation and design syndrome decoding interfaces to enable real-time active QEC.
- Design and specify I/O interfaces between syndrome decoders and orchestration software.
- Test and validate active QEC cycles on real quantum hardware.
- Analyse FPGA-based control systems to identify and implement performance improvements.
- Define integration strategies for combining HPC and classical orchestration with quantum node-level resource management.
- Collaborate with hardware teams, control engineers, and software developers to ensure architectural coherence.
- Contribute to technical documentation, architecture blueprints, and system specifications.
Job Requirements
- Strong understanding of quantum error correction principles and quantum system dynamics.
- Experience with modelling quantum systems or control processes.
- Experience with FPGA programming or low-level control systems is a plus.
- Familiarity with quantum compilers, decoders, and orchestration frameworks.
- Proficiency in Python; additional experience in hardware description languages (VHDL, Verilog) is advantageous.
- Comfort working across software and hardware teams to bridge theory and implementation.
- Strong communication and documentation skills.
- PhD or Master's in Physics, Systems Engineering, or related technical discipline
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