Staff Analog and Mixed-Signal Layout Engineer

Staff Analog and Mixed-Signal Layout Engineer page is loaded## Staff Analog and Mixed-Signal Layout Engineerlocations: Singapore-Yishuntime type: Full timeposted on: Posted Todayjob requisition id: R **Please Note:****1. If you are a first time user, please create your candidate login

Job Description The candidate should be able to work independently on block level and IP level Analog layout design, coordinating with the circuit designer and the rest of the layout team. The candidate will need to be able to work with both design engineers and mask design engineers in remote locations, and thus the ability to plan and efficiently use email...

As an Analog Mixed-Signal IC Layout Engineer, you will be part of a key team designing sophisticated advanced node CMOS products. Your responsibilities will include floor planning, creating layout of building blocks and integrating layout for circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, and CDRs in advanced CMOS nodes. Your focus will...

Please Note:1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)2. If you already have a Candidate Account, please Sign-In before you apply.Job Description:Job DescriptionThe candidate should be able work independently on block level and IP level Analog layout design,...

Senior Analog Mixed-Signal IC Layout Engineer Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL, and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to...

**Responsibilities**: - The Mixed-Signal IC (MEMS Interface) Design Engineer will be responsible for the design and development of capacitive and/or piezoelectric MEMS interface ASICs, including the required amplifiers, ADCs, filters and control logic, with characteristic high impedance inputs, ultra low power, low noise circuits etc. - The responsibility...

What You Can Expect In this role, the successful candidate will:- Lead the development of high-speed, high-performance SerDes IP in advanced technology nodes (5nm, 3nm, and beyond). Design complex IP blocks including, but not limited to, 112G/56G PAM4, 32G PAM2, DDR, Die-to-Die High-Speed Interconnect, and System PLL IPs. Collaborate with DSP, analog, and...

**Responsibilities**: - The Mixed-Signal IC (MEMS Interface) Design Engineer will be responsible for the design and development of capacitive and/or piezoelectric MEMS interface ASICs, including the required amplifiers, ADCs, filters and control logic, with characteristic high impedance inputs, ultra low power, low noise circuits etc. - The responsibility...

Roles & Responsibilities The candidate should be able work independently on block level and IP level Analog layout design, coordinating with the circuit designer and the rest of the layout team. The candidate will need to be able to work with both design engineers and mask design engineers in remote locations, and thus the ability to plan and efficiently use...

**Responsibilities**: - Manage a team of analog layout engineers, providing leadership, mentorship, and technical guidance. - Oversee the layout design, and verification in technologies such as CMOS etc. - Collaborate with design and PD teams to translate circuit designs into physical layouts. - Ensure the team meets project schedules and deliverables,...