FPGA Design Engineer

1 week ago


East Region, Singapore PERSOL Full time $80,000 - $120,000 per year

Key Responsibilities:Develop, simulate, and verify RTL designs for using Vivado and Vitis.Work on FPGA-based system bring-up, integration, and low-level debugging.Develop bare-metal C firmware for IP validation and board-level testing.Collaborate with cross-functional teams to validate designs on evaluation boards.Contribute to hardware platform bring-up, troubleshooting, and performance optimization.Support projects involving Versal ACAP and Zynq UltraScale+ MPSoC architectures.Requirements:Diploma/ Degree in EngineeringExperience with embedded Linux or driver developmentProven experience withFPGA design tools (Vivado, Vitis).Strong proficiency in RTL coding, verification, and validation (VHDL/Verilog/SystemVerilog).Hands-on experience with FPGA evaluation boards and hardware testing.Experience with bare-metal C firmware development for FPGA IP testing and integration.In-depth understanding of hardware bring-up and low-level debugging techniques.Familiarity with Versal ACAP and Zynq UltraScale+ MPSoC platforms.We regret to inform that only shortlisted candidates will be notified.Interested candidates, please click on the following link to begin your job search journey and submit your curriculum vitae (CV) directly through the official PERSOL job application platform - GO. By sending us your personal data and curriculum vitae (CV), you are deemed to consent to PERSOL Singapore Pte Ltd and its affiliates to collect, use and disclose your personal data for the purposes set out in the Privacy Policy available at . You acknowledge that you have read, understood, and agree with the Privacy Policy.PERSOL Singapore Pte Ltd • RCB No E • EA License No. 01C4394R Ngiam Xinyi )



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