Principal Application Engineer

7 days ago

Singapore Cadence Design Systems Full time

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

a. Minimum 8 years of experience in analog, RF or mixed-signal design
- Knowledge on various circuit topologies (e.g. current mirrors, opamps, etc)
- Ability to interpret layouts and to compare layout connections against schematic
- Understanding of the effect of parasitics RLCK devices on circuit performance
- Understanding of EM/IRdrop effects
- Experience in top level design integration would be an advantage

b. Familiar with the usage of the following tools:

- Virtuoso Schematic Editor
- Analog Design Environment (ADE)
- Virtuoso Layout Editor
- Simulators such as Spectre, AMS Designer, etc

c. Knowledge in 1 or more of the following tools would be an advantage:

- Physical Verification System (PVS)
- Quantus
- Liberate

d. Knowledge in 1 or more of the following programming languages would be an advantage:

- SKILL language
- Perl
- TCL
- Basic shell scripting

e. Good knowledge in Virtuoso front-to-back flow, including physical verification, parasitic extraction and post layout simulation

f. Ability to communicate effectively in English. Mandarin speaking ability would be an advantage

g. Job scope includes the following:

- Debugging of software issues
- Onsite customer support
- Business trips to Malaysia, Vietnam and other Southeast Asia countries

We’re doing work that matters. Help us solve what others can’t.

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