Staff Physical Design Engineer

5 days ago

Singapore Advanced Micro Devices, Inc Full time

Overview:
**WHAT YOU DO AT AMD CHANGES EVERYTHING**

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

AMD together we advance_

**Responsibilities**:
**THE ROLE**:
This is a Physical Design Engineering role that will require to take the design from RTL to GDS with synthesis, Place n Route, timing, and Physical Verification

**THE PERSON**:
Strong communication skills, ability to multi-task across projects, and work with geographically spread-out teams

**KEY RESPONSIBILITIES**:
**PREFERRED EXPERIENCE**:

- Major in EE, CS or related, master’s degree with 6+ years or Bachelor with 8+ years working experience, preferably with high speed multi-gigabit SerDes PHY designs or other high performance IP designs
- Proficiency in Python and/or Perl is required. Additional languages are a plus.
- Versatility with scripts to automate design flow, and quality checks.
- Experience in automated design flows for clock tree synthesis, clock and power gating techniques, buffer/repeater insertion, scan stitching, design optimization for improved timing/power/area, and design cycle time reduction
- Experience in floor planning, establishing design methodology, IP integration, checks for logic equivalence, physical/timing/electrical quality, and final signoff for large IP delivery.
- Strong experience with tools for logic synthesis, place and route, timing analysis, and design checks for physical and electrical quality, familiarity with tools for schematics, layout, and circuit/logic simulation

**ACADEMIC CREDENTIALS**:

- Major in EE, CS or related, master’s degree preferably with high-speed multi-gigabit SerDes PHY designs or other high-performance IP designs.

**LOCATION**:
Singapore

LI-HR1

LI-HYBRID

Qualifications:

- Benefits offered are described: _AMD benefits at a glance_._

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