Ic Design Engineer

24 hours ago

Yishun, Singapore Broadcom Full time

1. R&D engineer position available in design and physical implementation of high performance System-On-Chip ASICs. Key competencies required are:

- Working experience leading team in physical design implementation of large ASICs (100 to 400 million gates complexity).
- Demonstrated ability in providing technical support to customers and managing customer working relationship.
- Demonstrated strong technical hands-on competency in using leading edge physical design EDA tools in projects.
- In-depth CPU/DSP architecture/algorithm working knowledge and related physical design implementation knowledge highly advantageous.

2. Utilize commercial and in-house EDA tools for the design and implementation of 100 ~ 400 million gate integrated circuits in 16nm/7nm/5nm process technologies.

3. Opportunity to participate in innovation, design flow and methodology development to address challenges of designing into deep submicron processes and state-of-the-art ASIC design for computing and networking products

**Qualifications**: Requirements

1. Degree, Masters or PhD in Electrical/Electronics/Computer engineering with 5 years or more experience in a relevant field.

2. Familiarity with one or more VLSI design tools for Place&Route, Verilog Simulation, DRC/LVS Physical Verification, Static Timing Analysis and Power Integrity

3. Experience in Perl & Tcl Scripting languages

3. Proficiency in UNIX/Linux is advantageous.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

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