Principal Analog Mixed-Signal Design Engineer

1 week ago

Singapore Astera Labs Full time

Principal Analog Mixed-Signal Design Engineer Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL, and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at . Job Description: As an Analog/Mixed-Signal IC Design Engineer, you will be part of a key team designing sophisticated advanced node CMOS products. Your responsibilities will include developing and verifying circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, and CDRs to meet performance targets. You will also work on analog and clocking blocks for connectivity applications, using industry-standard tools like Spectre and MATLAB. The company seeks a highly motivated designer for this role. Basic Qualifications: Strong academic and technical background in electrical engineering. A Master's or PhD degree in EE is required, preferably from a top-tier university. 8+ years of experience supporting or developing complex analog IC designs. Required Experience: Hands-on experience in designing high-speed mixed-signal circuits including ADC/DAC data converters, RX front-end, TX driver/serializer, low-jitter PLLs, TX/RX calibration, low-jitter CLK distribution, and other high-speed analog circuits is a must. Have a deep understanding of biasing, band-gaps, reference circuits, opamps, comparators, and other analog circuits. Solid track record for implementation of analog circuits for high-speed data transmission. Design and tape-out experience in advanced CMOS nodes (e.g., 7nm, 5nm, 3nm FinFET) is a must. Solid fundamentals in detailed transistor-level design, feedback/stability analysis, and noise/jitter analysis. Knowledge of TIA design and drivers for optical applications is highly desirable. Experience in RFIC design for wireless or wireline communication systems is highly desirable. Strong technical independent contributor with a proven ability to drive results. Excellent teamwork, presentation, and documentation skills. Ability to collaborate with global teams across multiple time zones and deliver under pressure with strict deadlines. Strong experience in lab chip bring-up and debugging efforts. Preferred Experience: Relevant research publications and/or patents in analog or RF IC design. Familiarity with programming/scripting languages such as Python, Matlab, or C. Experience with PCB design. Familiarity with Verilog RTL or DSP design concepts. Knowledge of optical transceivers. Expertise in ESD protection techniques and IC packaging methodologies. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities. #J-18808-Ljbffr

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