Snr/Physical Design Engineer
2 weeks ago
Roles & Responsibilities WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. Together, we advance your career THE ROLE: This is a Physical Design Engineering role that will require to take the design from RTL to GDS with synthesis, Place n Route, timing, and Physical Verification THE PERSON: Strong communication skills, ability to multi-task across projects, and work with geographically spread-out teams KEY RESPONSIBILITIES: This Engineer will work on high-speed multi-gigabit SerDes PHY designs. This includes automated synthesis and timing driven place and route of RTL blocks for high speed Datapath and control logic applications, automated design flows for clock tree synthesis, clock and power gating techniques, buffer/repeater insertion, scan stitching, design optimization for improved timing/power/area, and design cycle time reduction. You will also support floor planning, establishing design methodology, IP integration, checks for logic equivalence, physical/timing/electrical quality, and final signoff for large IP delivery. PREFERRED EXPERIENCE: Proficiency in Python and/or Perl is required. Additional languages are a plus. Versatility with scripts to automate design flow, and quality checks. Experience in automated synthesis and timing driven place and route of RTL blocks (Verilog experience preferred) for high speed Datapath and control logic applications. Experience in automated design flows for clock tree synthesis, clock and power gating techniques, buffer/repeater insertion, scan stitching, design optimization for improved timing/power/area, and design cycle time reductionStrong background in digital circuit techniques, efficient and robust implementation topologies for logic functions, logic optimization, and transistor level circuit topologies for high speed, low power applications Experience in floor planning, establishing design methodology, IP integration, checks for logic equivalence, physical/timing/electrical quality, and final signoff for large IP delivery. Strong experience with tools for logic synthesis, place and route, timing analysis, and design checks for physical and electrical quality, familiarity with tools for schematics, layout, and circuit/logic simulation ACADEMIC CREDENTIALS: Bachelor's or Master’s degree in Electrical Engineering, Computer Science or related, with high-speed multi-gigabit SerDes PHY designs or other high-performance IP designs. Tell employers what skills you have PerlElectricalIPPythonTransistorVersatilityPhysical DesignVerilogElectrical EngineeringLayoutMechanical Engineering
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Physical Design Engineer
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Singapore, South West, Uni Connect Full time $120,000 - $180,000 per yearResponsibilities: •Fully responsible for Netlist -to -GDS physical design implementation of low power chips Requirements Requirements: •Bachelor/Masters Degree in Electrical/Computer Engineering •Experience in physical design with tape -outs •Knowledge of complete Netlist -to -GDS flow, Synopsys/Cadence tools like ICC or Encounter •Good in script...
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1 week ago
Singapore SUNLUNE (SINGAPORE) PTE. LTD. Full time $80,000 - $120,000 per yearJob Overview:We are seeking a motivated and detail-oriented Junior Physical Chip Design Engineer to contribute to the development of low-power, high-performance chip designs. This role will involve learning and assisting in full-chip physical design workflows, including floor planning, place-and-route, power network design, and physical verification, under...
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Physical Design Engineer
2 weeks ago
Singapore Voice Way Full time $180,000 - $250,000 per yearJob Description:Lead physical implementation at both block and top levels, including floorplanning, placement, clock tree synthesis (CTS), and routing;Drive timing closure, formal verification, low-power analysis, and power optimization;Perform IR drop and electromigration (EM) analysis, as well as physical verification including DRC, LVS, and ESD...
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Physical Chip Design Engineer
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Singapore SUNLUNE (SINGAPORE) PTE. LTD. Full timeRoles & Responsibilities Job Description: We are looking for a highly skilled Physical Chip Design Engineer to lead the development of low-power and high-performance chip design processes . This is a critical role that requires deep expertise in advanced semiconductor technologies and the ability to drive full-chip physical design workflows from start to...
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Staff Physical Design Engineer
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Singapore AMD Full timeOverview Staff Physical Design Engineer at AMD. This is a Physical Design Engineering role that will require taking the design from RTL to GDS with synthesis, Place and Route, timing, and Physical Verification. Responsibilities This engineer will work on high-speed multi-gigabit SerDes PHY designs. This includes automated synthesis and timing-driven place...
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ASIC Physical Design Engineer
2 weeks ago
Singapore Broadcom Inc. Full timeASIC Physical Design Engineer page is loaded## ASIC Physical Design Engineerlocations: Singapore-Yishuntime type: Full timeposted on: Posted Todayjob requisition id: R **Please Note:****1. If you are a first time user, please create your candidate login
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ASIC Physical Design Engineer
2 weeks ago
Singapore AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED Full timeQualifications Bachelor/Master/PhD or equivalent in Electrical or Computer Engineering Relevant work experience in physical design implementation of large ASICs (100 to 400 million gates complexity) Good teamwork and the ability to work in both small or large technical teams In-depth knowledge of GPU/CPU/DSP architecture/algorithm and related physical design...
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ASIC Physical Design Engineer
2 weeks ago
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