NAND Design Rule Engineer in Process Integration

NAND Design Rule Engineer in Process Integration Join to apply for the NAND Design Rule Engineer in Process Integration role at Micron Technology Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. Responsibilities Responsible for Design rule release, Design Rule check waivers, Mask and related DRC definitions, Mask review and sign off, Process Requirement Specifications for R&D and Production Designs Drive/Contribute to deliver key milestones from Project Kick Off till End of Life Collaborate with a network of stakeholders to direct development efforts for a new Advanced NAND generation Ensure the quality of DRCs released with appropriate reaction to deviation from established design rules and proper documentation Work with Yield Enhancement, Product Engineers, Defect analysis, and Quality Assurance teams to understand process issues related to the database layout and prioritize development of solutions Help design and evaluate test structures to provide data for next generation devices and to quantify process margin on current devices Summarize complex problems, derive, and explain actions taken to address them Drive effective multi-functional communication on issue resolution, and support across node Design Rule alignment Define sub-milestones for the project within the layout schedule and work with the various teams to achieve the targets and timelines Ensure the best possible communication between NAND Design Rule and other key stakeholders Enthusiastically identify and address process issues and process window vs. die size conflicts stemming from specific database layout or layout techniques Assure timely documentation and feedback of R&D activities regarding design rule improvements to production parts still in design phase What Sets You Apart 5 years of experience in semiconductor industry in Process Integration, Yield Enhancement, Product Engineering, Test Structure Development, or Unit Process Development Exposure to design & layout, ability to do minor layout and experience with CAD tools like Cadence Virtuoso, K2view, and Mentor Graphics DRV/RVE is highly desired Proven capability to successfully resolve sophisticated issues Understanding of Advanced NAND process flow and major NAND components such as BL sensing, Word-line driver, CMOS under array, etc. Familiarity with CAD group interactions, data post-processing, and the process of transferring data from the database to the reticle Master's Degree or higher in Electrical Engineering, Microelectronics, Physics, or related field with 5 years of experience in semiconductor industry or Bachelor's Degree plus 8 years' experience will also be considered. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron and Crucial brands. To learn more, please visit micron.com/careers. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other