Senior Hardware Engineer

4 days ago

Singapore beBeeCryptographer Full time $120,000 - $150,000
Job Title: Research Associate

Overview:

We are seeking a highly skilled Research Associate to join our team. The successful candidate will be responsible for adding a Hardware AES and ASCON Accelerator to the RISC-V CVA6 core.

Key Responsibilities:

  • Design and implementation of a Hardware AES Accelerator and ASCON Lightweight Cryptography Accelerator into the RISC-V CVA6 (Ariane) core.
  • Implement memory-mapped interfaces or custom instructions for the accelerators to interface with the CVA6 core.
  • Collaborate on the integration of the accelerators into the core's execution pipeline.
  • Define and implement custom RISC-V instructions to utilize the AES and ASCON hardware accelerators, if needed.
  • Modify the RISC-V CVA6 decode and execution stages to handle the new cryptographic instructions.
  • Work out the toolchain to ensure assembler, compiler, and simulation support for the custom instructions.
  • Conduct simulations to evaluate the performance, latency, and throughput of the accelerators within the CVA6 pipeline.
  • Work closely with the AES and ASCON accelerator design team to ensure proper testing and debugging of the hardware integration.

Requirements:

  • Masters degree in Electrical Engineering, Computer Engineering, or a related field.
  • Proven experience with RISC-V architecture, especially with custom instruction extensions and pipeline modifications.
  • Proficiency in HDL languages (Verilog, VHDL, or SystemVerilog) and RTL design.
  • Proficiency in toolchain modification, including the ability to extend assemblers and compilers (GCC, LLVM) for custom hardware instructions.
  • Proficiency of FPGA development tools such as Vivado, Quartus, or similar for prototyping.

Preferred Additional Skills:

  • Strong understanding of ASIC/FPGA design flows, including synthesis, place and route, and timing closure.
  • Experience in cryptography and implementing cryptographic algorithms in hardware (AES, ASCON, etc.).

About the Role:

This role requires deep knowledge of hardware design, cryptographic algorithms, and the RISC-V instruction set architecture (ISA). You will work closely with the AES and ASCON designers in our team to ensure seamless integration and optimal performance of the cryptographic accelerators.

The School:

Our school is renowned for its high academic standards and research. We have over 3,000 undergraduate students and 1,000 graduate students, making us one of the largest engineering schools in the world.

How to Apply:

To apply for this position, please submit your CV and cover letter to us. Only shortlisted candidates will be notified.

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