Senior Analog Design Engineer

1 day ago


Singapore KUN GAO XINXIN TECHNOLOGIES PTE. LTD. Full time
Company Overview:
Kun Gao Xin Xin Technologies PTE. LTD., a renowned leader in the development of 1G/2.5G/5GBase-T Ethernet physical layer PHY and switch chips, is seeking a highly skilled Senior Staff/Principal Analog Engineer to join its team.

Estimated Salary:$250,000 per annum, commensurate with experience, plus AWS, Bonus, and Stock options.

Job Description:
We are looking for an exceptional analog design engineer to lead our team in the development of high-speed low-power small-area network chips. The ideal candidate will have extensive experience in IC design, including chip tape-out and lab evaluation of designs, as well as expertise in using EDA CAD tools and performing Analog Custom Layout. Strong communication skills and good teamwork abilities are essential for this role.

Key Responsibilities:
  • Develop and implement analog system design specifications and architectures.
  • Lead analog designs during product development, ensuring compliance with company standards and regulatory requirements.
  • Collaborate with cross-functional teams to design and realize high-speed low-power small-area network chips.
  • Design and verify analog and mixed-signal circuits, particularly CMOS signal processing circuits, with expertise in areas such as RX (e.g., AFE, ADC), TX (Serializer, DAC), PLL, LDO, ESD/EMC suppression, etc.

Required Skills and Qualifications:
To be successful in this role, you will need:
  • A Master's degree or higher in Electrical Engineering or related field, with over 7 years' experience, or a PhD with over 4 years' experience in high-performance analog/mixed-signal ICs.
  • Proven experience in IC design, including chip tape-out and lab evaluation of designs.
  • Solid understanding of EDA CAD tools and Analog Custom Layout techniques.
  • Experience in measuring IC performance and debugging designs to correlate simulations with measurements.
  • Deep knowledge of fundamental concepts, including transistor-level design, device physics, control/feedback loop stability analysis.
  • Direct project experience in areas such as ADC-DAC design, PLL or clock/freq generation design, is highly desirable.
  • Familiarity with Verilog coding is a plus.

Benefits:
In addition to a competitive salary, we offer a comprehensive benefits package, including AWS, Bonus, and Stock options.

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