Advanced RTL Design Expert

2 weeks ago

Singapore beBeeDesign Full time $80,000 - $150,000
ISP RTL Design Engineer Job Description

We are seeking an experienced ISP RTL Design Engineer to implement ISP algorithms into hardware using Verilog, SystemVerilog, and/or SystemC. The ideal candidate will have a strong background in digital systems and verification.

Responsibilities:
  • Implement ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis).
  • Verify Logic at ISP level and Digital System level.
  • Optimize Design for less gate count and low power consumption.
  • Collaborate with the ISP Algorithm Team to drive design activities.
Requirements:
  • MSEE or BSEE degree in a related field.
  • Experience/knowledge in RTL, C/C++ programming, and verification.
  • Strong debugging and problem-solving skills.
  • Good communication and interpersonal skills.
  • Results-oriented and adaptable to changes.
  • C++/SystemC knowledge with High Level Synthesis experience is a plus.
  • Experience/knowledge in CMOS Image Sensor is a plus.
Key Skills:
  • RTL design.
  • Verification.
  • C/C++ programming.
  • High Level Synthesis.
  • CMOS Image Sensor.

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