Senior AI Sub-system Architect
4 days ago
Overview
Renesas Electronics is seeking a highly skilled and motivated Senior AI Sub-system Architect to join our R&D team in Tokyo, Beijing or Singapore. This role offers a unique opportunity to design the next generation hardware for AI sub-systems in high-performance computing (HPC) SoCs.
The ideal candidate will have a strong background in computer engineering, electrical engineering or a related field and 10+ years of experience in SoC and/or ASIC architecture and design. Prior direct experience in NPU architecture design is also required.
We are committed to creating a sustainable future where technology helps make our lives easier. Join us and contribute to developing innovative solutions that drive growth and success in the electronics industry.
About Renesas
Renesas is one of the top global semiconductor companies in the world, with a mission to develop a safer, healthier, greener, and smarter world. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products.
As a key supplier to leading manufacturers of electronics, we strive to deliver exceptional quality and innovation. With roughly 21,000 employees worldwide, we foster a culture of transparency, agility, global thinking, innovation, and entrepreneurship.
Responsibilities
- Design and lead the architecture of next-generation multi-core AI sub-systems, including CPU/DSP/NPU, memory hierarchies, scalable interconnects, etc.
- Perform HW/SoC architectural modeling, performance analysis, trade-off analysis, PPA optimization, etc.
- Demonstrate technical expertise across stakeholders, from system and software teams to architecture peers, and to technology leadership.
- Collaborate with silicon and platform bring-up to verify and debug AI sub-system performance.
Requirements
- Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or related field; Ph.D. is a plus.
- 10+ years of experience in SoC and/or ASIC architecture and design.
- Prior direct experience (>5 years) in NPU architecture design.
- Good knowledge of architecture analysis and performance modeling, ranging from simple analytical models to complex cycle accurate performance model and correlation.
Salary
$150,000 - $200,000 per year, depending on qualifications and experience.
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