Senior Design Validation Engineer

4 days ago


Singapore REALTEK SINGAPORE PRIVATE LIMITED Full time

**Job Overview**

REALTEK SINGAPORE PRIVATE LIMITED is a leading provider of innovative solutions in the electronics industry. We are currently seeking a Senior Design Validation Engineer to join our team and contribute to the development of cutting-edge technology.

Key Responsibilities:

  • Develop detailed test plans for all functional features based on the design specification, utilizing expertise in digital design verification to ensure that the verification environment is thoroughly tested and validated.
  • Collaborate with the digital design team to develop and implement efficient verification methodologies, resulting in reduced time-to-market and improved product quality.
  • Design and execute directed and constrain-random verification functional tests to ensure that the design meets the specified requirements, leveraging expertise in EDA tools and verification languages.
  • Provide technical guidance and support to junior engineers, fostering a culture of innovation and excellence within the team.

Requirements:

  • Bachelor's or Master's degree in Electronics or Electrical Engineering.
  • Minimum 3-7 years of experience in SOC/IP verification, with strong communication, analytical, and documentation skills.
  • Proficiency in hardware functional verification languages and object-oriented programming languages, preferably with System Verilog/UVM experience.
  • Familiarity with ASIC verification methodology, tools, and development flow, as well as working experience with complex high-speed custom VLSI products.


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