Senior/Staff Physical Design Engineer

Roles & ResponsibilitiesWhat you will do APU Physical Design Implementation for APU partitions focus on MDLA/NDLA n5/n4/n3e/ process Physical VerificaTion to deliver clean APU partition gds N5/n4/n3e/ process Perform Timing Closure ECO for APU partition including PrimeTime timing check and twk timing ECOWhat you bring Apr hands on for n5/n4/n3e process...

Roles & ResponsibilitiesWhat you will do APU Physical Design Implementation for APU partitions focus on MDLA/NDLA n5/n4/n3e/ process Physical VerificaTion to deliver clean APU partition gds N5/n4/n3e/ process Perform Timing Closure ECO for APU partition including PrimeTime timing check and twk timing ECOWhat you bring Apr hands on for n5/n4/n3e process...

Roles & ResponsibilitiesResponsibilities• Responsible for physical design, development for variety of SoC(System On Chip) and tape out.• Execute state-of-art methodologies include, floor-planning, place and route, RC extraction, timing and power optimization, physical verification.• Doing benchmarking on Performance/Power/Area to validate the...

Roles & ResponsibilitiesResponsibilities: Full responsible for Netlist-to-GDS physical design implementation of 12nm/6nm/4nm and below advanced process chips. Block owner, take block of 2~3 Million instances, working on Synthesis/APR(auto place and route)/Signoff Block coordinator role for more than 5~10 blocks, solving the critical issue and give the...

Roles & Responsibilities Responsible for the physical design tasks from the Netlist to the GDSII, including P&R, formal verification, static timing analysis, physical verification, power analysis, design for reliability and tape out. Liaise with the front-end design team to complete the chip floorplan, clock architecture, and power plan. Study the...

Responsible for the physical design tasks from the Netlist to the GDSII, including P&R, formal verification, static timing analysis, physical verification, power analysis, design for reliability and tape out.Liaise with the front-end design team to complete the chip floorplan, clock architecture, and power plan.Study the physical design methodology of...

Responsibilities:Full responsible for Netlist-to-GDS physical design implementation of 12nm/6nm/4nm and below advanced process chips.Block owner, take block of 23 Million instances, working on Synthesis/APR(auto place and route)/SignoffBlock coordinator role for more than 510 blocks, solving the critical issue and give the solution to block owners.TOP role...

Roles & ResponsibilitiesRESPONSIBILITIES:Netlist to GDSII at block level, Subsystem Level and at Full chip.• Worked on multiple tapeouts on Netlist to GDSII• Hierarchical partitioning and budgeting of block-level subsystems.• Implementation of high performance (HP) cores, low power designs• Node experience upto 7nm, 10nm, 14nm, 28nm.• Timing...

Roles & ResponsibilitiesJob Description Work on RTL to GDS, including synthesis, placement, clock tree insertion and routing. Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc. Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts using best-in-class methodologies. Work closely with...

Roles & ResponsibilitiesJob Description Work on RTL to GDS, including synthesis, placement, clock tree insertion and routing. Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc. Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts using best-in-class methodologies. Work closely with...

Position Overview:As design verification engineer, you would be part of a passionate verification team that is constantly pushing the limits - developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification. The goal is...

Position Overview: The Staff/Senior Design Engineer will be responsible for developing micro-architecture for Image Signal Processing Unit (ISP) and Computer Vision Unit (CV) related algorithms. They will utilize RTL design using Verilog/System Verilog coding and High-Level Synthesis (HLS) tools like Catapult. Additionally, they will analyse metrics such as...

We are currently looking for a highly motivated Senior Interior Designer to join our team based in Singapore. As a Senior Interior Designer, your main responsibility will be to collaborate closely with the SOG design lead on design and construction projects across Singapore and the Asia Pacific region, while also contributing to the expansion of our interior...

Roles & ResponsibilitiesJob Responsibilities:- Responsible for pre-silicon RTL coding of block, subsystem and top level SOC Integration Develop robust and reusable Code and ensure VHDL or Verilog implementation enables readiness for Verification, Synthesis, DfT and Low Power Insertion Develop reusable RTL Code, using Generic and Modular Coding Styl ...

Reports to: Chief Design Officer & Assistant Design Manager Role DescriptionWe're seeking a passionate individual to join our Head Office on a full-time basis. Ideally, you should be someone who understands our brand and embodies our values. We offer competitive salary packages, benefits, and opportunities for career growth. The current position available is...

Roles & ResponsibilitiesWe are currently looking for a highly motivated Senior Interior Designer to join our team based in Singapore. As a Senior Interior Designer, your main responsibility will be to collaborate closely with the SOG design lead on design and construction projects across Singapore and the Asia Pacific region, while also contributing to the...

Roles & ResponsibilitiesPosition Overview: The Staff/Senior Design Engineer will be responsible for developing micro-architecture for Image Signal Processing Unit (ISP) and Computer Vision Unit (CV) related algorithms. They will utilize RTL design using Verilog/System Verilog coding and High-Level Synthesis (HLS) tools like Catapult. Additionally, they will...

Roles & ResponsibilitiesPosition Overview:As design verification engineer, you would be part of a passionate verification team that is constantly pushing the limits – developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal...

Roles & ResponsibilitiesReports to: Chief Design Officer & Assistant Design Manager Role DescriptionWe're seeking a passionate individual to join our Head Office on a full-time basis. Ideally, you should be someone who understands our brand and embodies our values. We offer competitive salary packages, benefits, and opportunities for career growth. The...

Senior Graphic Designer Responsibilities:Designing graphic content, illustrations, and infographics.Managing graphic designs from conception to delivery.Reviewing junior designer drafts to ensure quality.Generating fresh concepts.Ensuring brand consistency throughout various marketing projects.Liaising between the marketing and design teams to ensure...