Senior Staff SOC Design Engineer

Position Overview:You would be part of a dynamic digital SoC design team that develops state-of-the-art video processing, neural processing, advanced video analytics accelerators, and the entire Camera Processor SoC. You would be joining the team to explore, evaluate and define innovative design SoC architectures, to meet or exceed the technical requirements...

Roles & ResponsibilitiesPosition Overview:You would be part of a dynamic digital SoC design team that develops state-of-the-art video processing, neural processing, advanced video analytics accelerators, and the entire Camera Processor SoC. You would be joining the team to explore, evaluate and define innovative design SoC architectures, to meet or exceed...

Roles & ResponsibilitiesJob Responsibilities:- Responsible for pre-silicon RTL coding of block, subsystem and top level SOC Integration Develop robust and reusable Code and ensure VHDL or Verilog implementation enables readiness for Verification, Synthesis, DfT and Low Power Insertion Develop reusable RTL Code, using Generic and Modular Coding Styl ...

JOB DESCRIPTION. Discussion with system engineers on SoC architecture and feedback on optimization.. Work on SoC integration system block development, e.g., power management, clock/reset, system register, test control, PinMux, etc. Discussion with synthesis engineer and back-end engineer on design optimization.. SoC DFT support. SoC verification plan and SoC...

JOB DESCRIPTIONDiscussion with system engineers on SoC architecture and feedback on optimization.Work on SoC integration; system block development, e.g., power management, clock/reset, system register, test control, PinMux, etc;Discussion with synthesis engineer and back-end engineer on design optimization.   SoC DFT support;SoC verification plan and SoC...

JOB DESCRIPTION Discussion with system engineers on SoC architecture and feedback on optimization. Work on SoC integration; system block development, e.g., power management, clock/reset, system register, test control, PinMux, etc; Discussion with synthesis engineer and back-end engineer on design optimization.    SoC DFT support; SoC verification plan and...

Roles & ResponsibilitiesJOB DESCRIPTION· Discussion with system engineers on SoC architecture and feedback on optimization.· Work on SoC integration; system block development, e.g., power management, clock/reset, system register, test control, PinMux, etc;· Discussion with synthesis engineer and back-end engineer on design optimization.· SoC DFT...

Job Description :Responsibilities:Provide engineering supporting an SOC environment.Plan, test and deploy patches for SOC systems.Work with Dev Ops and SOC team to plan for developmental work.Manage lifecycle of security log sources, including onboarding, modifying, and decommissioning of log sources.Perform data engineering to extract, transform, load for...

JOB DESCRIPTION. Work with SoC Integration and SoC Timing on power structure optimization. Work on UPF development to support different stages of implementation flow and SoC verification. Work on power structure, eg. Isolation of power domains, level-shifter crossing voltage domains. Conduct power structure check at different implementation stages.. Support...

JOB DESCRIPTIONWork with SoC Integration and SoC Timing on power structure optimizationWork on UPF development to support different stages of implementation flow and SoC verificationWork on power structure, eg. Isolation of power domains, level-shifter crossing voltage domainsConduct power structure check at different implementation stages. Support back-end...

JOB DESCRIPTION Work with SoC Integration and SoC Timing on power structure optimization Work on UPF development to support different stages of implementation flow and SoC verification Work on power structure, eg. Isolation of power domains, level-shifter crossing voltage domains Conduct power structure check at different implementation stages.  Support...

Roles & ResponsibilitiesJob Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCs Implement coverage matrix using cover point and assertion Create and debug tests for DUT Resolve bugs with...

Roles & ResponsibilitiesJOB DESCRIPTION· Work with SoC Integration and SoC Timing on power structure optimization· Work on UPF development to support different stages of implementation flow and SoC verification· Work on power structure, eg. Isolation of power domains, level-shifter crossing voltage domains· Conduct power structure check at different...

Responsibilities: Provide engineering supporting an SOC environment. Plan, test and deploy patches for SOC systems. Work with Dev Ops and SOC team to plan for developmental work. Manage lifecycle of security log sources, including onboarding, modifying, and decommissioning of log sources. Perform data engineering to extract, transform, load for...

Responsibilities: Provide engineering supporting an SOC environment. Plan, test and deploy patches for SOC systems. Work with Dev Ops and SOC team to plan for developmental work. Manage lifecycle of security log sources, including onboarding, modifying, and decommissioning of log sources. Perform data engineering to extract, transform, load for...

Roles & ResponsibilitiesJob Description: Responsible for IP level and/or SOC level verification. Develop verification plan for complex digital IP from design spec, work closely with design engineers to identify important verification scenarios. Create verification environment/testbench with Bus Functional Model (BFM) using SystemVerilog,...

We are looking for SOC Engineers across 2-5 years of experience. Responsibilities: Overse the implementation lifecycle of new security systems Upgrading and maintenance of security systems, and troubleshooting Educate SOC Analysts on new security systems Skillsets: Experience in SIEM programming and interpretation of TCP/IP & routing protocols ...

Responsibilities:Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.Develop reusable testbenches, test cases using constrained-random and directed...

Job Description:Responsible for IP level and/or SOC level verification.Develop verification plan for complex digital IP from design spec, work closely with design engineers to identify important verification scenarios.Create verification environment/testbench with Bus Functional Model (BFM) using SystemVerilog, UVM and/or System C.Identify and implement...

Job DescriptionsDevelop and Review Test Plan based on IC design specificationDevelop constrained-Random verification environment for complex DUTDevelop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCsImplement coverage matrix using cover point and assertionCreate and debug tests for DUTResolve bugs with remote...