Sr/ IC Design Engineer

3 weeks ago


Singapore ETHOS SEARCH ASSOCIATES PTE. LTD. Full time
Roles & Responsibilities

Job Descriptions

  • Develop and Review Test Plan based on IC design specification
  • Develop constrained-Random verification environment for complex DUT
  • Develop/Modify Testbenches and test programmes using UVM-SV for Pre-Silicon IP/ICs/SOCs and ensure product meet their performance
  • Implement coverage matrix using cover point and assertion
  • Create and debug tests for DUT
  • Resolve bugs with remote designers

Requirements

  • Bachelor/Masters Degree in Electrical/Electronics/Computer Engineering with 1 year or more experience
  • Hands-on experience in Silicon/ IP verification using SystemVerilog/ UVM
  • Strong understanding of verification process from test plan to coverage completion
  • Strong communication and Analytical skills
  • Understanding of HDL (Verilog, VHDL)
  • Experience in using leading EDA software tools like Cadence/ Synopsys

Ethos Search Associates Pte. Ltd.

EA Licence No: 13C6655

EA Reg No: R1109557 Rose

Tell employers what skills you have

design verification
Analytical Skills
Synopsys Tools
Digital IC Design
Test Cases
EDA
UVM
IP
SoC
SystemVerilog
Semiconductors
Semiconductor Device
Cadence
Functional Verification
ASIC
Electronic design automation (EDA)
Test Development
Debugging
IC
Verilog

  • Singapore ETHOS SEARCH ASSOCIATES PTE. LTD. Full time

    Job Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches and test programmes using UVM-SV for Pre-Silicon IP/ICs/SOCs and ensure product meet their performance Implement coverage matrix using cover point and assertion Create and debug...


  • Singapore Ethos Search Associates Pte Ltd Full time

    Job Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches and test programmes using UVM-SV for Pre-Silicon IP/ICs/SOCs and ensure product meet their performance Implement coverage matrix using cover point and assertion Create and...


  • Singapore Ethos Search Associates Pte Ltd Full time $90,000 - $120,000 per year

    Job DescriptionsDevelop and Review Test Plan based on IC design specificationDevelop constrained-Random verification environment for complex DUTDevelop/Modify Testbenches and test programmes using UVM-SV for Pre-Silicon IP/ICs/SOCs and ensure product meet their performanceImplement coverage matrix using cover point and assertionCreate and debug tests for...


  • Singapore ETHOS SEARCH ASSOCIATES PTE. LTD. Full time

    Roles & ResponsibilitiesJob DescriptionDesign and Develop ICs using leading EDA software; work on RTL to GDS, including synthesis, layout, floor planning, placement, clock tree insertion and routing. Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc. Design, implement and maintain synthesis, DFT and Static Timing...


  • Singapore beBeeVerification Full time $120,000 - $150,000

    Job TitleSr Engineer, Tech LeadDescriptionWe are seeking a Sr Engineer, Tech Lead to join our team. In this role, you will be responsible for developing and reviewing test plans, verification IP and reference models. You will also implement tests with randomization based coverage driven verification methodology and functional/code coverage...


  • Singapore ETHOS SEARCH ASSOCIATES PTE. LTD. Full time

    Job Description Design and Develop ICs using leading EDA software; work on RTL to GDS, including synthesis, layout, floor planning, placement, clock tree insertion and routing. Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc. Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts...


  • Singapore Ethos Search Associates Pte Ltd Full time

    Job Description Design and Develop ICs using leading EDA software; work on RTL to GDS, including synthesis, layout, floor planning, placement, clock tree insertion and routing. Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc. Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts...


  • Singapore Ethos Search Associates Pte Ltd Full time $90,000 - $120,000 per year

    Job DescriptionDesign and Develop ICs using leading EDA software; work on RTL to GDS, including synthesis, layout, floor planning, placement, clock tree insertion and routing.Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc.Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts using...


  • Singapore ETHOS TECH ONE PTE. LTD. Full time

    **Job Descriptions** - Develop and Review Test Plan based on IC design specification - Develop constrained-Random verification environment for complex DUT - Develop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCs - Implement coverage matrix using cover point and assertion - Create and debug tests for DUT - Resolve bugs with remote...


  • Singapore beBeeIcDesignEngineer Full time $120,000 - $160,000

    Job Title: Senior IC Design EngineerWe are seeking an experienced Senior IC Design Engineer to join our team in the development of innovative digital CMOS ICs.About the Role:Design and implement high-quality, low-power digital CMOS ICs for various applications.Collaborate with cross-functional teams to ensure timely delivery of projects.Mentor junior...