Senior Silicon Design Engineer
15 hours ago
THE PERSON:
The ideal candidate should have a deep understanding of analog design and able to lead, attend and present at design review meetings with teams worldwide.
KEY RESPONSIBILITIES:
- Circuit design of wireline transceiver building blocks (PLL, clock distribution, receiver front-end, transmitter front-end, serializer, deserializer, etc.)
- Conduct peer reviews of circuit design and verification results
- Working with validation team to evaluate silicon results
PREFERRED EXPERIENCE:
- Extensive experience with high speed analog design with blocks like ADC, PLL, clock distribution, receiver front-end, transmitter front-end, serializer, deserializer.
- Experience with latest process technologies like 7nm or below Finfet technology.
ACADEMIC CREDENTIALS:
- Bachelors/Masters/Phd Degree in Electronic Engineering
LOCATION:
Singapore
Tell employers what skills you have
Construction
PLL
BIM
Structural Analysis
Solidworks
Architects
Drawing
Electrical
3D
Circuit Design
Analog Design
Engineering Design
AutoCAD
Civil Engineering
Wireline
Layout
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