Junior / Senior Analog IC Design Engineer
2 weeks ago
Key Responsibilities:
- Development of Analog/Mixed-Signal circuits from specifications to prototypes.
- System-level analysis and evaluation, full-chip architecture design, analysis, modeling, simulation, and integration.
- Schematic entry, corner simulation, layout consideration, and post-layout simulation.
- Work closely with the layout engineer to conduct the physical implementation (layout) and chip floor planning.
- Responsible for post-layout extraction and parasitic analysis.
- Able to work with other designers, Chip Architects, and layout engineers to achieve full-chip integration, place and route, top-level verification, and tape out.
Requirements:
- Ph.D./Master/Degree in Electrical Engineering or Microelectronics with excellent technical background in Analog /Mixed-Signal IC design
- Min. 3 years of experience in CMOS Analog IC design and simulation
- Candidates with no prior working experience are welcome to apply.
- Good design experience in Analog IC design involving two or more of the following blocks: low noise pre-amplifier (low offset, high CMRR, high PSRR and bandwidth up to 600MHz), CMOS Gigahertz Oscillator, switched capacitor circuit, LDO, Differential Amplifier, comparator, Opamp, TIA, and Bandgap Reference and high-frequency full-wave rectifier, etc.
- Good design knowledge in ESD and Latch-Up.
- Experience in isolator devices (capacitive-coupler or optical-coupler) and photodetector-associated circuits will be an added advantage.
- Experience with sigma-delta modulators and IO drivers will be an added advantage.
- Good working knowledge of relevant analog IC design and simulation tools (Spice or its equivalent)
- Basic understanding and can develop simple design-related scripts with some common script languages, such as perl, Tcl, matlab or cadence skill etc.
- A team player with good communication skills.
- Able to work independently, flexibly, and creatively.
Tell employers what skills you have
Tape
Modeling
Analog
Architects
Good Communication Skills
CMOS
Architecture Design
Cadence
IC
TIA
Electrical Engineering
Layout
Able To Work Independently
Document Review
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