NTI Process Integration engineer
1 week ago
As a Process Engineer you will be primarily responsible for starting up, developing and optimizing processes to improve product quality and reliability, working on process yield improvement, cost reduction, productivity improvement and risk management as well as resolving manufacturing line problems.
You will also be required to identify, diagnose and resolve assembly process related problems by applying failure analysis, FMEA, 8D or SPC/FDC methodology.
Additional responsibilities include coordinating and carrying out process, equipment and material evaluation/optimization to implement changes at process step, leading and participating in yield improvement and cost reduction activities, handling new process baseline qualifications and managing, auditing and liaising with material suppliers to achieve quality, cost and risk management objectives.
Job Description
-Identify, quantify key CMOS/interconnect module deficiencies/technology gaps and drive cross-functional teams to optimize existing process flows, conceptualize, and develop new innovative solutions to meet product requirements and manufacturability.
-Measure and control CMOS/interconnect electrical and reliability test parameters. -Develop/re-define critical specifications criteria for optimum product performance and drive activities to get them to manufacturing process capability.
-Extract and analyze inline, probe, parametric, reliability, and other critical metrics and predict future behavior of the CMOS device performance of the product to enable early innovative solutions to meet product and device specifications.
-Early introduction, characterization and validation of new CMOS device models and test structures for developing future NAND products.
-3 dimensions analysis with the use of K2 view to extract layout information and combine with the doping profiles of each implant step for product development and integration solutions.
-Interact and collaborate with TCAD, modeling, and layout teams to drive clearer definition of CMOS device and reliability improvements across multiple tech-nodes and designs.
-Coordinate activities at manufacturing site towards gating experiment funding, conversions, and effectively communicate decisions made to all R&D, manufacturing, and relevant stakeholders.
-Assist in the transfer of a new technology from R&D to manufacturing and contribute towards ensuring successful ramp and qualification. Supporting the transfer, documentation and training of module fundamentals into manufacturing
Requirement
- Bachelor or Masters in Electrical Engineering/ Chemical/ Mechanical/ Materials Science Engineering/ Chemistry/ preferably specialized in Microelectronics and Semiconductor Device Physics.
- Deep understanding of probe failure mechanism, ability to do electrical bench data collection.
-In-depth knowledge of and direct experience with nonvolatile memories along with good understanding of the NAND process flow, interaction of process & device, common yield and reliability issues is desirable.
-Exposure to R&D and transfer/manufacturing is desirable.
- Candidates with experience that aligns with the job responsibilities would be advantageous
- Proficiency in data analysis, machine learning, and statistical modeling to derive actionable insights from complex datasets is an added advantage.
- Strong aptitude for development and ability to create production-worthy technologies -Self-motivated, self-governing with proven ability to work in a demanding and dynamic environment.
-Ability to coordinate cross-functional teams to achieve a goal. Solid data analysis, communication and reporting abilities with demonstrated presentation abilities.
-Curiosity and natural tendency of learning new things independently. Ability to travel for extended periods of time to the US for collaborative R&D work.
Tell employers what skills you haveStatistical Modeling
Data Analysis
Modeling
TCAD
Process Capability
Physics
Electrical
Reliability
Characterization
CMOS
Product Development
Manufacturing
Electrical Engineering
Layout
Presentation Abilities
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